S3C7324 Просмотр технического описания (PDF) - Samsung
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S3C7324 Datasheet PDF : 37 Pages
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PRODUCT OVERVIEW
FEATURES
Memory
— 256 × 4-bit RAM
— 4096 × 8-bit ROM
I/O Pins
— Input only: 8 pins
— I/O: 16 pins
— Output only: 8 pins sharing with segment driver
outputs
LCD Controller/Driver
— Maximum 14-digit LCD direct drive capability
— 28 segment and 4 common pins
— Display modes: Static, 1/2 duty (1/2 bias)
1/3 duty (1/2 or 1/3 bias), 1/4 duty (1/3 bias)
— Internal resistor circuit for LCD bias
8-Bit Basic Timer
— Programmable interval timer
— Watchdog timer
8-Bit Timer
— Programmable 8-bit timer
Watch Timer
— Real-time and interval time measurement
— Four frequency outputs to BUZ pin
— Clock source generation for LCD
24-Bit Frequency Counter (FC)
— Level = 300mVpp (Min.)
— AMF input range = 0.5 MHz to 10 MHz
— FMF input range = 30 MHz to 150 MHz
A/D Converter
— 4-channels with 8-bit resolution
— 17 µs (Min.) conversion speed
S3C7324/P7324
Bit Sequential Carrier
— Support 16-bit serial data transfer in arbitrary
format
Interrupts
— Two internal vectored interrupts
— Three external vectored interrupts
— Two quasi-interrupts
Memory-Mapped I/O Structure
— Data memory bank 15
Two Power-Down Modes
— Idle mode (only CPU clock stops)
— Stop mode (main system clock stops)
— Subsystem clock stops
Oscillation Sources
— Crystal, ceramic, or RC for main system clock
— Crystal or external oscillator for subsystem clock
— Main system clock frequency: 4.19 MHz (typical)
— Subsystem clock frequency: 32.768 kHz
— CPU clock divider circuit (by 4, 8, or 64)
Instruction Execution Times
— 0.95, 1.91, 15.3 µs at 4.19 MHz (main)
— 122 µs at 32.768 kHz (subsystem)
Operating Temperature
— – 40 °C to 85 °C
Operating Voltage Range
— 1.8 V to 5.5 V at 3 MHz
— 3.0 V to 5.5 V at FC mode
Package Type
— 64-pin QFP
1-2
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