S25FL064A Просмотр технического описания (PDF) - Spansion Inc.
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S25FL064A
Spansion Inc.
S25FL064A Datasheet PDF : 32 Pages
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S25FL064A
64 Megabit CMOS 3.0 Volt Flash Memory
with 50MHz SPI (Serial Peripheral Interface) Bus
Data Sheet (Preliminary)
Distinctive Characteristics
Architectural Advantages
Single power supply operation
– Full voltage range: 2.7 to 3.6 V read and program operations
Memory Architecture
– 128 sectors with 512 Kb each
Program
– Page Program (up to 256 bytes) in 1.5 ms (typical)
– Program operations are on a page by page basis
Erase
– 1.5 s typical sector erase time
– Bulk erase command
Cycling Endurance
– 100,000 cycles per sector typical
Data Retention
– 20 years typical
Device ID
– JEDEC standard two-byte electronic signature
– RES command one-byte electronic signature for backward
compatibility
Process Technology
– Manufactured on 0.20 µm MirrorBitTM process technology
Package Option
– Industry Standard Pinouts
– 16-pin SO package (300 mils)
Performance Characteristics
Speed
– 50 MHz clock rate (maximum)
Power Saving Standby Mode
– Standby Mode 50 µA (max)
– Deep Power Down Mode 1 µA (typical)
Memory Protection Features
Memory Protection
– W# pin works in conjunction with Status Register Bits to protect
specified memory areas
– Status Register Block Protection bits (BP2, BP1, BP0) in status
register configure parts of memory as read-only
Software Features
– SPI Bus Compatible Serial Interface
Publication Number S25FL064A_00
Revision C0
Issue Date September 6, 2006
This document states the current technical specifications regarding the Spansion product(s) described herein. The Preliminary status of this document indicates that product qual-
ification has been completed, and that initial production has begun. Due to the phases of the manufacturing process that require maintaining efficiency and quality, this document
may be revised by subsequent versions or modifications due to changes in technical specifications.
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