PBL40215 Просмотр технического описания (PDF) - Ericsson
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PBL40215 Datasheet PDF : 22 Pages
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PBL 402 15
EN
REF
VccPLL
GndPLL
GndCP
CP
VccCP
NC
NC
VccVCO
VTUNE
GndVCO
48 47 46 45 44 43 42 41 40 39 38 37
1
36
2
35
3
34
4
33
5
32
6
31
7
30
8
29
9
28
10
27
11
26
12
25
13 14 15 16 17 18 19 20 21 22 23 24
GndRF
RX+
RX-
GndRF
IFOUT+
IFOUT-
LD
VccIF
GndIF
IFIN+
IFIN-
PA Gate
Figure 5. Pinning configuration.
Pin Descriptions:
Refer to pin configuration.
Pin number
Name
1
EN
2
REF
3
VCCPLL
4
GndPLL
5
GndCP
6
CP
Function
Enable 3-wire interface and synthesiser.
Schematic in/output of the pin
VCCPLL
165 k
EN
GndPLL
VCCPLL
PLL reference clock input
REF
Voltage supply to the frequency synthesiser.
Ground connection to the frequency synthesiser.
Ground connection to the charge pump.
GndPLL
Clamp to GndPLL
A diode to GndCP and GndRF
A diode to GndPLL and GndVCO
Charge pump output.
VCCCP
CP
7
VCCCP
Voltage supply to the charge pump.
Clamp to GndCP
GndCP
3
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