MN86062 Просмотр технического описания (PDF) - Panasonic Corporation

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MN86062

CODEC LSI for Facsimile Images

Panasonic Corporation 

For Communications Equipment

MN86062

CODEC LSI for Facsimile Images

Overview

The MN86062 is a high-speed LSI codec for compressing

and decompressing images using the MH, MR, and MMR

standard compression methods specified in the ITU-T T.4

and T.6 recommendation. Registers and other settings

provide flexible support for a variety of processing.

Features

Compression methods

MH, MR, and MMR

Operating mode:

Page mode

Bus configuration:

Choice of dual- or single-bus operation

Decoding error processing:

Choice of replacing with the previous line or a

white line

Image bus configuration:

8 bits, maximum 16 megabytes address

space of image bus, 2-channel master DMA

System bus configuration:

X80 interface compatible, 8 bits, 2-channel

slave DMA

Pixels per line:

maximum 64K, in byte increments

Concurrent DMA transfers over image bus and

command processing

Support for pointer management for image buffer

Wide selection of independent parameters for coding,

decoding, transfers between buses, and DMA

transfersr

Support for time-shared processing by line for both

coding and decoding

Applications

Facsimile equipment

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