DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

MAX6747 Просмотр технического описания (PDF) - Maxim Integrated

Номер в каталоге
Компоненты Описание
производитель
MAX6747 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
µP Reset Circuits with Capacitor-Adjustable
Reset/Watchdog Timeout Delay
Typical Operating Characteristics (continued)
(VCC = +5V, TA = +25°C, unless otherwise noted.)
VCC TO RESET DELAY
vs. TEMPERATURE (VCC FALLING)
27.0
VCC FALLING AT 1mV/µs
26.6
26.2
25.8
RESET AND WATCHDOG
TIMEOUT PERIOD vs. VCC
0.60
CSWT = CSRT = 100pF
0.56
0.52
0.48
RESET AND WATCHING TIMEOUT
PERIOD vs. VCC
9.0
CSWT = CSRT = 1500pF
8.5
RESET
8.0
WATCHDOG
7.5
7.0
25.4
0.44
6.5
25.0
-50 -25
0 25 50 75 100 125
TEMPERATURE (°C)
0.40
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
VCC (V)
6.0
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
VCC (V)
MAX6746
MAX6747
1
2
3
4
Pin Description
PIN
MAX6748–
MAX6751
1
2
3
4
MAX6752
MAX6753
1
2
3
4
NAME
FUNCTION
MR
Manual Reset Input. Pull MR low to manually reset the device. Reset
remains asserted for the reset timeout period after MR is released.
Reset Input. High-impedance input to the adjustable reset comparator.
RESET IN Connect RESET IN to the center point of an external resistor-divider to
set the threshold of the externally monitored voltage.
SET0
SWT
Logic Input. SET0 selects watchdog window ratio or disables the
watchdog timer. See Table 1.
Watchdog Timeout Input.
MAX6746MAX6751: Connect a capacitor between SWT and ground to
set the basic watchdog timeout period (tWD). Determine the period by
the formula tWD = 5.06 x 106 x CSWT with tWD in seconds and CSWT in
Farads. Extend the basic watchdog timeout period by using the WDS
input. Connect SWT to ground to disable the watchdog timer function.
MAX6752/MAX6753: Connect a capacitor between SWT and ground to
set the slow watchdog timeout period (tWD2). Determine the slow
watchdog period by the formula: tWD2 = 0.65 x 109 x CSWT with tWD2 in
seconds and CSWT in Farads. The fast watchdog timeout period is set
by pinstrapping SET0 and SET1 (Connect SET0 high and SET1 low to
disable the watchdog timer function.) See Table 1.
SRT
GND
Reset Timeout Input. Connect a capacitor from SRT to GND to select
the reset timeout period. Determine the period as follows: tRP = 5.06 x
106 x CSRT with tRP in seconds and CSRT in Farads.
Ground
_______________________________________________________________________________________ 5

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]