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MAX17040 Просмотр технического описания (PDF) - Maxim Integrated

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MAX17040 Datasheet PDF : 13 Pages
First Prev 11 12 13
MAX17040/MAX17041
1-Cell/2-Cell Fuel Gauge with ModelGauge
Table 5. 2-Wire Protocol Key
KEY
S
SAddr
MAddr
Data
A
N
DESCRIPTION
START bit
Slave address (7 bit)
Memory address byte
Data byte written by master
Acknowledge bit—master
No acknowledge—master
KEY
Sr
W
P
Data
A
N
DESCRIPTION
Repeated START
R/W bit = 0
STOP bit
Data byte returned by slave
Acknowledge bit—slave
No acknowledge—slave
Basic Transaction Formats
Write: S. SAddr W. A. MAddr. A. Data0. A. Data1. A. P
A write transaction transfers 2 or more data bytes to the
MAX17040/MAX17041. The data transfer begins at the
memory address supplied in the MAddr byte. Control of
the SDA signal is retained by the master throughout the
transaction, except for the acknowledge cycles:
Read: S. SAddr W. A. MAddr. A. Sr. SAddr R. A. Data0. A. Data1. N. P
Write Portion
Read Portion
A read transaction transfers 2 or more bytes from the
MAX17040/MAX17041. Read transactions are composed
of two parts, a write portion followed by a read portion,
and are therefore inherently longer than a write transac-
tion. The write portion communicates the starting point
for the read operation. The read portion follows immedi-
ately, beginning with a Repeated START, Slave Address
with R/W set to a 1. Control of SDA is assumed by the
MAX17040/MAX17041, beginning with the Slave Address
Acknowledge cycle. Control of the SDA signal is retained
by the MAX17040/MAX17041 throughout the transaction,
except for the acknowledge cycles. The master indicates
the end of a read transaction by responding to the last
byte it requires with a no acknowledge. This signals the
MAX17040/MAX17041 that control of SDA is to remain
with the master following the acknowledge clock.
Write Data Protocol
The write data protocol is used to write to register to
the MAX17040/MAX17041 starting at memory address
MAddr. Data0 represents the data written to MAddr,
Data1 represents the data written to MAddr + 1, and
DataN represents the last data byte, written to MAddr +
N. The master indicates the end of a write transaction by
sending a STOP or Repeated START after receiving the
last Acknowledge bit:
The MSB of the data to be stored at address MAddr can
be written immediately after the MAddr byte is acknowl-
edged. Because the address is automatically incremented
after the LSB of each byte is received by the MAX17040/
MAX17041, the MSB of the data at address MAddr + 1
can be written immediately after the acknowledgment of
the data at address MAddr. If the bus master continues an
autoincremented write transaction beyond address 4Fh,
the MAX17040/MAX17041 ignore the data. A valid write
must include both register bytes. Data is also ignored
on writes to read-only addresses. Incomplete bytes and
bytes that are not acknowledged by the MAX17040/
MAX17041 are not written to memory.
Read Data Protocol
The read data protocol is used to read to register from the
MAX17040/MAX17041 starting at the memory address
specified by MAddr. Both register bytes must be read
in the same transaction for the register data to be valid.
Data0 represents the data byte in memory location
MAddr, Data1 represents the data from MAddr + 1, and
DataN represents the last byte read by the master:
S. SAddr W. A. MAddr. A. Sr. SAddr R. A.
Data0. A. Data1. A... DataN. N. P
Data is returned beginning with the MSB of the data in
MAddr. Because the address is automatically increment-
ed after the LSB of each byte is returned, the MSB of the
data at address MAddr + 1 is available to the host imme-
diately after the acknowledgment of the data at address
MAddr. If the bus master continues to read beyond
address FFh, the MAX17040/MAX17041 output data val-
ues of FFh. Addresses labeled Reserved in the memory
map return undefined data. The bus master terminates
the read transaction at any byte boundary by issuing a no
acknowledge followed by a STOP or Repeated START.
S. SAddr W. A. MAddr. A. Data0. A. Data1. A... DataN. A. P
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