WS1M8-XCX Просмотр технического описания (PDF) - White Electronic Designs => Micro Semi
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WS1M8-XCX Datasheet PDF : 6 Pages
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WS1M8-XXX
HI-RELIABILITY PRODUCT
2x512Kx8 DUALITHIC™ SRAM
FEATURES
s Access Times 17, 20, 25, 35, 45, 55ns
s Revolutionary, Center Power/Ground Pinout
s Packaging:
• 32 pin, Hermetic Ceramic DIP (Package 300)
• 36 lead Ceramic SOJ (Package 100)
• 36 lead Ceramic Flatpack (Package 226)
PIN CONFIGURATION FOR WS1M8-XDJX
AND WS1M8-XFX
36 CSOJ
36 FLATPACK
TOP VIEW
A0
1
A1
2
A2
3
A3
4
A4
5
CS1
6
I/O0
7
I/O1
8
VCC
9
GND
10
I/O2
11
I/O3
12
WE
13
A5
14
A6
15
A7
16
A8
17
A9
18
36
NC
35
A18
34
A17
33
A16
32
A15
31
OE
30
I/O7
29
I/O6
28
GND
27
VCC
26
I/O5
25
I/O4
24
A14
23
A13
22
A12
21
A11
20
A10
19
CS2
PIN DESCRIPTION
A0-18
I/O0-7
CS1-2
OE
WE
VCC
GND
Address Inputs
Data Input/Output
Chip Selects
Output Enable
Write Enable
+5.0V Power
Ground
BLOCK DIAGRAM
I/O0-7
WE
OE
A0-18
512K x 8
512K x 8
s Organized as two banks of 512Kx8
s Commercial, Industrial and Military Temperature Ranges
s 5 Volt Power Supply
s Low Power CMOS
s TTL Compatible Inputs and Outputs
PIN CONFIGURATION FOR WS1M8-XCX
32 DIP
TOP VIEW
A18 1
A16 2
A14 3
A12 4
A7 5
A6 6
A5 7
A4 8
A3 9
A2 10
A1 11
A0 12
I/O0 13
I/O1 14
I/O2 15
GND 16
32 VCC
31 A15
30 A17
29 WE
28 A13
27 A8
26 A9
25 A11
24 CS2
23 A10
22 CS1
21 I/O7
20 I/O6
19 I/O5
18 I/O4
17 I/O3
PIN DESCRIPTION
A0-18
I/O0-7
CS1-2
WE
VCC
GND
Address Inputs
Data Input/Output
Chip Selects
Write Enable
+5.0V Power
Ground
BLOCK DIAGRAM
I/O0-7
WE
A0-18
512K x 8
512K x 8
NOTE:
C S 1(1)
(1)
CS2
C S 1 (1)
C S 2 (1)
1. CS1 and CS2 are used to select the lower and upper 512Kx8 of the device. CS1 and CS2 must not be enabled at the same time.
October 2000 Rev. 4
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
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