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DSN17N12S3.3 Просмотр технического описания (PDF) - Power-One Inc.

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DSN17N12S3.3
Power-One
Power-One Inc. Power-One
DSN17N12S3.3 Datasheet PDF : 3 Pages
1 2 3
DSN17 SERIES – SINGLE OUTPUT
NOTES
(1) All parameters measured at Tc = 25°C, nominal input voltage and full rated load unless otherwise
noted. Refer to the Technical Reference Section for the definition of terms, measurement circuits and
other information.
(2) Noise is measured per Technical Reference Section. Measurement bandwidth is 0-20 MHz. RMS noise
is measured over a 0.01-1 MHz bandwidth. To simulate standard PCB decoupling practices, output
noise is measured with a 1F tantalum and 0.01µF ceramic capacitor located 1 inch away from the
converter.
(3) The worst case output voltage includes line, load and temperature effects.
(4) Short term stability is defined as the drift over 24 hours with constant line, load and ambient tempera-
ture conditions.
(5) Requires a 470F/16V capacitor across output terminals.
DSN17 SERIES APPLICATION NOTES:
External Capacitance Requirements
No external input capacitance is required for operation of the
DSN17 Series. To meet the reflected ripple requirements of the
converter, an input impedance of less than 0.075 from DC to
100KHz is required. If a capacitive input source is farther than 2”
from the converter, an additional capacitor may be required at the
input pins for proper operation. External output capacitance is not
required for operation above 50% output power, however it is rec-
ommended that 1F to 10F of tantalum and 0.001 to 0.1F
ceramic capacitance be selected for reduced system noise.
Operation below 50% output power may require the addition of
a 470F capacitor to meet noise specifications.
Negative Outputs
Due to the non-isolated nature of the DSN17 Series, generation
of negative output voltages is not possible.
Remote ON/OFF Operation
The remote ON/OFF pin should be tied to the -INPUT pin if this
function is not used. It is recommended to drive this pin with a
CMOS or TTL gate. An open collector output may be used with a
2.2Kto 50Kresistor tied to +INPUT. When the ON/OFF pin
is pulled low with respect to the -INPUT, the converter is placed
in a low power drain state. The input capacitors are kept fully
charged in the OFF mode. The OFF state current is typically less
than 5mA.
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