CS48500 Просмотр технического описания (PDF) - Cirrus Logic

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CS48500

32-bit Audio Decoder DSP Family

Cirrus Logic 

CS48500 Data Sheet

32-bit Audio Decoder DSP Family

2. Overview

The CS48500 DSP Family is designed to provide high-performance post-processing and mixing of ditial

audio. The dual clock domain provided on the PCM inputs allows for the mixing of audio streams with

different sampling frequencies. The low-power standby preserves battery life for applications which are

always on, but not necessarily processing audio, such as automotive audio systems.

There are three devices comprising the CS48500 family. The CS48520, CS48540 and CS48560 are

differentiated by the number of inputs and outputs available. All DSPs support dual input clock domains

and dual audio processing paths. All DSPs are available in a 48-pin QFP package. Please refer to Table

2 on page 8 for the input, output, firmware features of each device.

2.1 Licensing

T Licenses are required for all of the 3rd party audio processing algorithms listed in Section 3. Please

DRAF contact your local Cirrus Logic Sales representative for more information.

CONFIDENTDIEALLPHI

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©Copyright 2006 Cirrus Logic, Inc.

DS734A3

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