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ADM3232E Просмотр технического описания (PDF) - Analog Devices

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ADM3232E Datasheet PDF : 12 Pages
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ADM3232E
THEORY OF OPERATION
The ADM3232E is a single-channel RS-232 line driver/receiver.
Step-up voltage converters, coupled with level-shifting transmitters
and receivers, allow RS-232 levels to be developed while operating
from a single 3.3 V supply.
CMOS technology is used to keep the power dissipation to an
absolute minimum, allowing maximum battery life in portable
applications.
CIRCUIT DESCRIPTION
The internal circuitry consists of the following main sections:
A charge pump voltage converter
A 3.3 V logic to RS-232 transmitter
An RS-232 to 3.3 V logic receiver
Charge Pump Voltage Converter
The charge pump voltage converter consists of a 200 kHz
oscillator and a switching matrix. The converter generates a
±6.6 V supply from the input 3.3 V level. This is accomplished
in two stages by using a switched capacitor technique as shown
in Figure 10. First, the 3.3 V input supply is doubled to 6.6 V by
using Capacitor C1 as the charge storage element. The +6.6 V
level is then inverted to generate −6.6 V, using C2 as the storage
element.
Capacitor C3 and Capacitor C4 are used to reduce the output
ripple. Their values are not critical and can be increased, if desired.
Capacitor C3 is shown connected between V+ and VCC. It is also
acceptable to connect this capacitor between V+ and GND.
If desired, larger capacitors (up to 10 μF) can be used for
Capacitor C1 to Capacitor C4.
+3.3V INPUT
C1 +
0.1µF
10V
C2 +
0.1µF
10V
TTL/CMOS
INPUTS
T1IN
T2IN
ADM3232E
C1+
+3.3V TO +6.6V
VOLTAGE
VCC
C1– DOUBLER V+
C2+ +6.6V TO –6.6V V–
VOLTAGE
C2– INVERTER
T1
T2
C3
0.1µF
6.3V
C4
0.1µF
10V
C5
0.1µF
T1OUT
T2OUT
RS-232
OUTPUTS
TTL/CMOS
OUTPUTS
R1OUT
R2OUT
R1
R2
GND
R1IN
5k
RS-232
INPUTS*
R2IN
5k
*INTERNAL 5kPULL-DOWN RESISTOR
ON EACH RS-232 INPUT.
Figure 10. Typical Operating Circuit
VCC
GND
S1
S3
+
C1
+
C3
V+ = 2VCC
S2
S4
VCC
INTERNAL
OSCILLATOR
Figure 11. Charge Pump Voltage Doubler
V+
FROM
VOLTAGE
DOUBLER
GND
S1
S3
GND
+
C2
+
C4
S2
S4
V– = –(V+)
INTERNAL
OSCILLATOR
Figure 12. Charge Pump Voltage Inverter
3.3 V Logic to RS-232 Transmitter
The drivers convert 3.3 V logic input levels into RS-232 output
levels. With VCC = 3.3 V and driving an RS-232 load, the output
voltage swing is typically ±6 V.
RS-232 to 3.3 V Logic Receiver
The receivers are inverting level shifters that accept RS-232 input
levels and translate them into 3 V logic output levels. The inputs
have internal 5 kΩ pull-down resistors to ground and are pro-
tected against overvoltages up to ±30 V. Unconnected inputs
are pulled to 0 V by the internal 5 kΩ pull-down resistor. This
results in a Logic 1 output level for unconnected inputs or for
inputs connected to GND.
The receivers have Schmitt trigger inputs with a hysteresis level
of 0.4 V. This ensures error-free reception for both noisy inputs
and for inputs with slow transition times.
ESD Protection on RS-232 Pins
All RS-232 (TxOUT and RxIN) inputs and outputs are protected
against electrostatic discharges (up to ±15 kV). This ensures
compliance with IEC 1000-4-2 requirements.
HIGH BAUD RATE
The ADM3232E features high slew rates, permitting data trans-
mission at rates well in excess of the EIA-232E specifications.
RS-232 voltage levels are maintained at data rates up to 460 kbps,
even under worst-case loading conditions. The slew rate is
internally controlled to less than 30 V/μs to minimize EMI
interference.
Rev. B | Page 8 of 12

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