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UPD63310GK-9EU Просмотр технического описания (PDF) - NEC => Renesas Technology

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Компоненты Описание
производитель
UPD63310GK-9EU
NEC
NEC => Renesas Technology NEC
UPD63310GK-9EU Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
µPD63310
Pin Number
Pin Name
31
MCLK
32
LRCLK
33
BCLK
34
35
36
37
38-40
41, 42
43-48
49-53
54
55
56
57
58, 59
60
61, 62
63
64
65
66
67
68
69
70
SI
NC
SO
DVDD
NC
DGND1, DGND2
DATA5-DATA0
NC
DACR
OUTR
DACL
OUTL
AGND5, AGND4
AVDD
NC
VRRI
VRRO
VRLI
VRLO
VXRI
VXRO
VXLI
NC
(2/3)
I/O
Function
I
Master clock input pin. Used for input of 256-fs clock (duty: 40 to 60%).
O
Serial interface’s frame sync clock output pin.
Used for L channel data I/O when LRCLK = low level
Used for R channel data I/O when LRCLK = high level
O
Serial interface’s bit sync clock output pin.
Used for I/O of audio data from SI and SO in sync with BCLK. BCLK is
generated on-chip as MCLK divided by eight.
I
Serial interface’s data input pin. Used for serial input (synchronized with
BCLK) of audio data (two’s complement, MSB first).
No connection
O
Serial interface’s data output pin. Used for serial output (synchronized with
BCLK) of audio data (two’s complement, MSB first).
Digital power supply pin. Used for input voltage range of +3 to +5.5 V.
No connection
G
Digital ground pins.
I/O
Parallel data I/O pins. Used for input/output of address data and volume
setting data.
No connection
O
R-channel DAC output pin. When this pin is used, the R-channel DAC output
can be monitored without attenuation regardless of the volume setting.
O
R-channel analog audio output pin.
O
L-channel DAC output pin. When this pin is used, the L-channel DAC output
can be monitored without attenuation regardless of the volume setting.
O
L-channel analog audio output pin.
G
Analog ground pins.
Analog power supply pin. Used for input voltage range of +3 to +5.5 V.
No connection
I
Reference voltage input pin for R-channel DAC. This pin is usually connected
to VRRO pin.
O
Reference voltage output pin for R-channel DAC. Output is 1.4 V (TYP.).
Connects to analog GND via a bypass capacitor.
I
Reference voltage input pin for L-channel DAC. This pin is usually connected
to VRLO pin.
O
Reference voltage output pin for L-channel DAC. Output is 1.4 V (TYP.).
Connects to analog GND via a bypass capacitor.
I
Reference voltage input pin for R-channel ADC. This pin is usually connected
to VXRO pin.
O
Reference voltage output pin for R-channel ADC. Output is 1.4 V (TYP.).
Connects to analog GND via a bypass capacitor.
I
Reference voltage input pin for L-channel ADC. This pin is usually connected
to VXLO pin.
No connection
5

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