ST16C1450CP28 Просмотр технического описания (PDF) - Exar Corporation

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ST16C1450CP28

2.97V TO 5.5V UART

Exar Corporation 

ST16C1450/51

2.97V TO 5.5V UART

áç

REV. 4.2.0

2.2 Crystal Oscillator or External Clock

The 145X includes an on-chip oscillator (XTAL1 and XTAL2). The crystal oscillator provides the system clock to

the Baud Rate Generators (BRG) in the UART. XTAL1 is the input to the oscillator or external clock buffer input

with XTAL2 pin being the output. For programming details, see “Section 2.3, Programmable Baud Rate

Generator” on page 8.

The on-chip oscillator is designed to use an industry standard microprocessor crystal (parallel resonant,

fundamental frequency with 10-22 pF capacitance load, ESR of 20-120 ohms and 100ppm frequency

tolerance) connected externally between the XTAL1 and XTAL2 pins (see Figure 4). Alternatively, an external

clock can be connected to the XTAL1 pin to clock the internal baud rate generator for standard or custom rates.

Typical oscillator connections are shown in Figure 4. For further reading on oscillator circuit please see

application note DAN108 on EXAR’s web site.

FIGURE 4. TYPICAL OSCILLATOR CONNECTIONS

XTAL1

C1

22-47pF

XTAL2

R2

500K - 1M

R1

0-120

(Optional)

1.8432 MHz

Y1

to

24 MHz

C2

22-47pF

2.3 Programmable Baud Rate Generator

The UART has its own Baud Rate Generator (BRG). The BRG divides the input crystal or external clock by a

programmable divisor between 1 and (216 -1) to obtain a 16X sampling clock of the serial data rate. The

sampling clock is used by the transmitter for data bit shifting and receiver for data sampling. The BRG divisor

(DLL and DLM registers) defaults to a random value upon power up or a reset. Therefore, the BRG must be

programmed during initialization to the operating data rate. Programming the Baud Rate Generator Registers

DLM and DLL provides the capability of selecting the operating data rate. Table 1 shows the standard data

rates available with a 14.7456 MHz crystal or external clock at 16X clock rate. When using a non-standard data

rate crystal or external clock, the divisor value can be calculated for DLL/DLM with the following equation.

divisor (decimal) = (XTAL1 clock frequency) / (serial data rate x 16)

8

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