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SCAN18373T Просмотр технического описания (PDF) - Fairchild Semiconductor

Номер в каталоге
Компоненты Описание
производитель
SCAN18373T
Fairchild
Fairchild Semiconductor Fairchild
SCAN18373T Datasheet PDF : 12 Pages
First Prev 11 12
Extended AC Electrical Characteristics
TA = 25°C
VCC = 5.0V
CL = 50 pF
TA = −40°C to +85°C
Symbol
Parameter
18 Outputs
VCC = 5.0V ± 0.5V
Units
Switching
CL = 250 pF
(Note 16)
(Note 17)
Min
Typ
Max
Min
Max
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tOSHL
(Note 20)
Propagation Delay
Latch Enable to Output
Propagation Delay
Data to Output
Output Enable Time
Output Disable Time
Pin to Pin Skew
HL Data to Output
3.0
12.0
4.0
13.5
ns
3.0
12.8
4.0
16.0
3.0
11.5
4.0
13.0
ns
3.0
11.5
4.0
14.5
2.5
10.5
(Note 18)
ns
2.5
12.5
2.0
10.5
(Note 19)
ns
2.0
10.5
0.5
1.0
1.0
ns
tOSLH
(Note 20)
Pin to Pin Skew
LH Data to Output
0.5
1.0
1.0
ns
Note 16: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase (i.e., all LOW-to-
HIGH, HIGH-to-LOW, etc.).
Note 17: This specification is guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load. This specification pertains to single output switching only.
Note 18: 3-STATE delays are load dominated and have been excluded from the datasheet.
Note 19: The Output Disable Time is dominated by the RC network (500, 250 pF) on the output and has been excluded from the datasheet.
Note 20: Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device.
The specification applies to any outputs switching HIGH-to-LOW (tOSHL), LOW-to-HIGH (tOSLH), or any combination switching LOW-to-HIGH.
Capacitance
Symbol
CIN
COUT
CPD
Parameter
Input Pin Capacitance
Output Pin Capacitance
Power Dissipation Capacitance
Typ
Units
4.0
pF
13.0
pF
34.0
pF
Conditions
VCC = 5.0V
VCC = 5.0V
VCC = 5.0V
11
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