AN-5023 Просмотр технического описания (PDF) - Fairchild Semiconductor

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AN-5023

LVDS Compatibility with Other Differential Interface Standards (Preliminary)

Fairchild Semiconductor 

Compatibility with RS-422 and RS-485 Standards (Continued)

Preliminary

FIGURE 1. Driver Output Levels

FIGURE 2. Application of RS-422 Data to an LVDS Receiver

The R1, R2, and R3 resistor divider network collectively is

a total differential load of 100Ω to match the characteristic

impedance of the transmission line and reduces the typical

RS-422 differential signal amplitude of 3.3V down to a

330mV level. Essentially, the resistor network is a 10:1

attenuation circuit. Refer to the equation below to calculate

the voltage drops across the resistors.

The majority (90%) of the RS-422 voltage is dropped

across resistors R1 and R2, leaving the remaining voltage

to be dropped across R3 which is compatible to the LVDS

receiver.

ITOT = VTOT/RTOT

(Current through the resistor network)

= 3.3V / (R1 + R2 = R3)

= 3.3V / 100Ω

= 33 mA

(Voltage across R1)

V1 = ITOT * R1

= (33mA)(45Ω)

= 1.485V

(Voltage across R2)

V2 = ITOT * R2

= (33mA)(45Ω)

= 1.485V

(Voltage across R3)

V3 = ITOT * R3

= (33mA)(10Ω)

= 330mV

Summary

Compatibility of TIA/EIA-644 LVDS drivers and receivers

with other interface standards can be achieved by employ-

ing additional attenuation circuitry within the interface

points of the system. When inter-operation of LVDS compli-

ant devices is desired, provisions should be made to imple-

ment the attenuation circuitry that adjusts the differential

amplitude voltages of the balanced driver to be within the

receiver voltage range. As always, application specific

requirements and needs may dictate what design tech-

niques must be implemented to make a reliable intercon-

nect system.

www.fairchildsemi.com

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