M80C186EB Просмотр технического описания (PDF) - Intel

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производитель

M80C186EB

16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR

Intel 

M80C186EB

Name

HOLD

HLDA

NCS

ERROR

PEREQ

UCS

LCS

P1 0 GCS0

P1 1 GCS1

P1 2 GCS2

P1 3 GCS3

P1 4 GCS4

P1 5 GCS5

P1 6 GCS6

P1 7 GCS7

T0OUT

T1OUT

T0IN

T1IN

Table 4 M80C186EB Pin Descriptions (Continued)

Type

Description

I

HOLD request input to signal that an external bus master wishes to gain

A(L)

control of the local bus The M80C186EB will relinquish control of the local

bus between instruction boundaries not conditioned by a LOCK prefix

O

HoLD Acknowledge output to indicate that the M80C186EB has relinquish

H(1)

control of the local bus When HLDA is asserted the M80C186EB will (or

R(0)

has) floated its data bus and control signals allowing another bus master to

P(0)

drive the signals directly

O

Numerics Coprocessor Select output is generated when accessing a

H(1)

numerics coprocessor

R(1)

P(1)

I

ERROR input that indicates the last numerics coprocessor operation

A(L)

resulted in an exception condition An interrupt TYPE 16 is generated if

ERROR is sampled active at the beginning of a numerics operation

I

CoProcessor REQuest signals that a data transfer between an External

A(L)

Numerics Coprocessor and Memory is pending

O

Upper Chip Select will go active whenever the address of a memory or I O

H(1)

bus cycle is within the address limitations programmed by the user After

R(1)

reset UCS is configured to be active for memory accesses between

P(1)

0FFC00H and 0FFFFFH

O

Lower Chip Select will go active whenever the address of a memory bus

H(1)

cycle is within the address limitations programmed by the user LCS is

R(1)

inactive after a reset

P(1)

O

H(X) H(1)

R(1)

P(X) P(1)

These pins provide a multiplexed function If enabled each pin can provide

a Generic Chip Select output which will go active whenever the address of

a memory or I O bus cycle is within the address limitations programmed by

the user When not programmed as a Chip-Select each pin may be used as

a general purpose output Port As an output port pin the value of the pin

can be read internally

O

H(Q)

R(1)

P(Q)

I

A(L)

A(E)

Timer OUTput pins can be programmed to provide a single clock or

continuous waveform generation depending on the timer mode selected

Timer INput is used either as clock or control signals depending on the

timer mode selected

17

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