PFM19030 Просмотр технического описания (PDF) - Cree, Inc
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PFM19030 Datasheet PDF : 15 Pages
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PFM19030
Recommended Passive Bias Circuit
This schematic demonstrates a method of applying the Sense FETs internal to the module that uses passive
external circuitry. The circuit maintains a constant current through the Sense FETS, independent of
temperature of the die. The Sense FETs are configured in this case as diodes. The temperature dependence
of the Vf of the diode is very similar to that of the RF FET gate voltage, and therefore the quiescent current
remains nearly constant over a wide temperature range. The advantage of this circuit is its simplicity and
stability (avoidance of operational amplifiers) under all layout conditions. The main limitation of the circuit
is that quiescent currents must be adjusted for each individual module (they are not easily pre-set with
precision).
GND
+27 V
+10 to
+20 V
Gate
J1
8
7
6
5
4
3
2
1
Note: Typical Q1 diode bias = 1.4 mA (VG1 ~ 3.96V)
Typical Q2 diode bias = 2.7 mA (VG2 ~ 4.21V)
(based on 6/4/04 measurements)
C28
C24
C22
C20
C2
RF
Out
C1
C29
C27
S1
S2
C12 C11 C10
R6
R5
C23
C21
C19
RF
OUT
C18 C17 C16 C15
PFM19030
Drain 1
Sense D2
Gate 2
Sense D1
RF IN
R2
C9
C8
C7
R1
C3
R3
RF
C4
C6
Input
C5
Page 9 of 15 Specifications subject to change without notice. U.S. Patent No. 6,822,321
http://www.cree.com/
Rev. 2
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