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PBL38620/2SHT

Subscriber Line Interface Circuit

Ericsson  

PBL 386 20/2

hybrid balance to accommodate different

line impedances without change of

hardware. In addition, the transmit and

receive gain may be adjusted. Please, refer

to the programmable CODEC/filter data

sheets for design information.

Longitudinal Impedance

A feed back loop counteracts longitudinal

voltages at the two-wire port by injecting

longitudinal currents in opposing phase.

Thus longitudinal disturbances will

appear as longitudinal currents and the

TIPX and RINGX terminals will experience

very small longitudinal voltage excursions,

leaving metallic voltages well within the

SLIC common mode range.

The SLIC longitudinal impedance per

wire, ZLoT and ZLoR, appears as typically

20Ω to longitudinal disturbances. It should

be noted that longitudinal currents may

exceed the dc loop current without distur-

bing the vf transmission.

Capacitors CTC and CRC

The capacitors designated CTC and CRC

in figure 12, connected between TIPX

and ground as well as between RINGX

and ground, can be used for RFI filtering.

The recommended value for CTC and

CRC is 2200 pF. Higher capacitance

values may be used, but care must be

taken to prevent degradation of either

longitudinal balance or return loss. CTC

and CRC contribute to a metallic imped-

ance of 1/(π·f·CTC) = 1/(π·f·CRC), a TIPX to

ground impedance of1/(2·π·f·CTC) and a

RINGX to ground impedance of

1/(2·π·f·CRC).

AC - DC Separation Capacitor, CHP

The high pass filter capacitor connected

between terminals HP and TIPX provides

the separation of the ac signal from the

dc part. CHP positions the low end

frequency response break point of the ac

loop in the SLIC. Refer to table 1 for a

recommended value of CHP.

Example: A CHP value of 47 nF will

position the low end frequency response

3dB break point of the ac loop at 5.6 Hz

(f3dB) according to f3dB = 1/(2⋅π⋅RHP⋅CHP)

where RHP = 600k Ω.

High-Pass Transmit Filter

The capacitor CTX in figure 12 connected

between the VTX output and the

CODEC/filter forms, together with RTX and/

or the input impedance of a programmable

CODEC/filter, a high-pass RC filter. It is

RFB

VTX

RTX

PBL

386 20/2

ZT

ZB

Z RX

RSN

VT

Combination

CODEC/Filter

VRX

Figure 10. Hybrid function.

recommended to position the 3 dB break

point of this filter between 30 and 80 Hz to

get a faster response for the dc steps that

may occur at DTMF signalling.

Capacitor CLP

The capacitor CLP, which connects between

the terminals CLP and VBAT, positions the

high end frequency break point of the low

pass filter in the dc loop in the SLIC. CLP

together with CHP and ZT (see section Two-

Wire Impedance) forms the total two wire

output impedance of the SLIC. The choise

of these programmable components have

an influence on the power supply rejection

ratio (PSRR) from VBAT to the two wire

side at sub-audio frequencies. At these

frequencies capacitor CLP also influences

the transversal to longitudinal balance in

the SLIC. Table 1 suggests a suitable value

on CLP. The typical value of the transversal

to longitudinal balance (T-L bal.) at 200Hz

is given in table 1 for the chosen value on

CLP.

Battery Feed

The PBL 386 20/2 SLIC emulate a battery

characteristic with current limitation

adjustable.The open loop voltage measured

between the TIPX and RINGX terminals is

tracking the battery voltage VBat. The

signalling headroom, or overhead voltage

VTRO, is programmable with a resistor ROV

connected between terminal POV on the

SLIC and ground. Please refer to section

“Programmable overhead voltage(POV)”.

The battery voltage overhead,VOH,depends

on the programmed signal overhead voltage

VTRO . VOH defines the TIP to RING voltage

at open loop conditions according to

VTR(at IL = 0 mA) = |VBat| - VOH.

Refer to table 2 for the typical value on

VOH.

SLIC

VOH(typ) [V]

PBL 386 20/2

2.5 +VTRO

Table 2. Battery overhead.

RFeed

[Ω]

2·25

T-L bal.

RSG CLP @ 200Hz CHP

[kΩ] [nF] [dB] [nF]

0

150 -46 47

Table 1. RSG, CLP and CHP values for cons-

tant current feeding characteristics.

For values outside table 1, please contact

Ericsson Microelectronics for assistance.

The current limit (reference A - C in figure

13) is adjusted by connecting a resistor,

RLC, between terminal PLC and ground

according to the equation:

RLC =

1000

ILProg + 4

where RLC is in kΩ for ILProg in mA.

A second, lower battery voltage may be

connected to the device at terminal VBAT2

to reduce short loop power dissipation.

The SLIC automatically switches between

the two battery supply voltages without need

for external control. The silent battery

11

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