OR4E10 Просмотр технического описания (PDF) - Agere -> LSI Corporation

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OR4E10

ORCA® Series 4 Field-Programmable Gate Arrays

Agere -> LSI Corporation 

ORCA Series 4 FPGAs

Preliminary Data Sheet

December 2000

Embedded Block RAM (continued)

Table 11. Constant Multiplier Signals

Port Signals

AR0[15:0]

AW(1:0)[8:0]

D(1:0)[17:0]

CKW[0:1]

CKR[0:1]

CSW[1:0]

CSR[1:0]

Q[23:0]

I/O

Function

I

Data input—operand.

I

Address bits.

I

Data inputs to load memory or change coefficient.

I

Positive-edge write port clock.

I

Positive-edge read port clock. Used for synchronous multiply mode.

I

Active-high write enable.

I

Active-high read enable.

O

Data outputs—product result.

Table 12. 8 x 8 Multiplier Signals

Port Signals

AR0[7:0]

AR1[7:0]

AW(1:0)[8:0]

D(1:0)[17:0]

CKW[0:1]

CKR[0:1]

CSW[1:0]

CSR[1:0]

BW(1:0)[1:0]

Q[15:0]

I/O

Function

I

Data input—multiplicand.

I

Data input—multiplier.

I

Address bits for memory.

I

Data inputs to load memory.

I

Positive-edge write port clock.

I

Positive-edge read port clock. Used for synchronous multiply mode.

I

Active-high write enable.

I

Active-high enables. For enabling address registers.

I

Byte-lane write for loading memory.

O

Data outputs—product.

Table 13. CAM Signals

Port Signals

I/O

AR(1:0)[7:0]

I

AW(1:0)[8:0]

I

D(1:0)[17]

I

D(1:0)[16]

I

D(1:0)[3:0]

I

CSW[1:0]

I

CSR[1:0]

I

Q(1:0)15:0]

O

Function

Data match.

Data write.

Clear data active-high.

Single match active-high.

CAM address for data write.

Active-high write enable. Enable for CAM data write.

Active-high enable data registers. Enable for CAM data registers.

Decoded data outputs. 1 corresponds to a data match at that address location.

30

Lucent Technologies Inc.

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