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MC71000 Просмотр технического описания (PDF) - Motorola => Freescale

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MC71000
Motorola
Motorola => Freescale Motorola
MC71000 Datasheet PDF : 32 Pages
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Pin Assignment Listing
Table 2. Pin Descriptions (Continued)
Clock, Reset, and JTAG Signals
EXTAL CLK
32 kHz external crystal clock input
XTAL CLK
32 kHz Crystal output
TDI (Test Data Input)
The test data input pin provides a serial input data stream to all TAP controllers. TDI is
sampled on the rising edge of TCK.
The test data output pin is tri-statable, providing serial output data from the Master TAP
TDO (Test Data Output) or ARM Core TAP controller. It is actively driven in the shift-IR and shift-DR controller
states of the TAP controller state machine. TDO changes on the falling edge of TCK.
TRST (Test Reset)
This active low Schmitt trigger input pin provides an asynchronously reset signal to all
TAP controllers to initialize the test controller.
The test mode select input pin is used to sequence all TAP controllers. The TAP
TMS (Test Mode Select) sequenced is determined by the tap control module and the TTS device port. TMS is
sampled on the rising edge of TCK.
TCK (Test Clock)
The test clock input pin is used to synchronize the JTAG test logic. It provides the clock
to synchronize the test logic and shift serial data to and from all TAP controllers.
RTCK (Return Test Clock)
The return test clock input pin returns the synchronization test clock to ARM
development tools to be entered from the serial debug input line.
TTS (Test TAP select)
The test tap select input pin directly controls the multiplexing logic to select between the
chip TAP and the core TAP. A logic 1 applied to the tap select input will select the chip
TAP.
MODE[1:0]
Test/boot mode select pins. In order to support a flexible development system, the
system must be capable to boot from different memories during system reset and
power-up. The four different memory maps can be selected by these two pins. All the
different boot modes start reading data at address 0x0000_0000, since this is where the
ARM7 reset vector is located.
RESETIN (Reset In)
The reset in pin is an active low Schmitt trigger input that provides reset to the internal
circuitry. The RESET input will be qualified as valid if it will be asserted for at least 3 CLK
cycles.
Bluetooth Signals
REFCTRL
(Reference Control)
The reference control pin is a dedicated output from the CRM which enables/disables
the reference clock.
REFCLK (Reference Clock)
The reference clock pin is a dedicated input into the CRM from the RF interface.
(12-32 MHz)
BT1
Input from the RF front end. Frame sync for the MC13180 RF IC; CSPI_din for Silicon
Wave
BT2
RXDATA: Input from the MC13180 RF IC and Silicon Wave RF Front End
BT3
TXDATA: Output to the MC13180 RF IC and Silicon Wave RF Front End
BT4
Dedicated RF control output to the RF Front Ends. RXTX_EN for the MC13180 RF IC
Radio or HOP_STROBE for the Silicon Wave Radio.
BT5
CSPI_CLK: One of the three CSPI signals which program the MC13180 RF IC Radio or
one of the four CSPI signals which program the Silicon Wave Radio.
BT6
CSPI_EN: One of the three CSPI signals which program the MC13180 RF IC Radio or
one of the four CSPI signals which program the Silicon Wave Radio.
CSPI_DOUT/CSPI_DIN: One of the three CSPI signals which program the MC13180
BT7
RF IC Radio (CSPI_DIN or CSPI_DOUT) or one of the four CSPI signals which program
the Silicon Wave Radio (CSPI_DOUT)
MOTOROLA
MC71000 Advance Information
11
Preliminary

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