MAX5361 Просмотр технического описания (PDF) - Maxim Integrated

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MAX5361

Low-Cost, Low-Power 6-Bit DACs with 2-Wire Serial Interface in SOT23 Package

Maxim Integrated 

Low-Cost, Low-Power 6-Bit DACs with

2-Wire Serial Interface in SOT23 Package

ELECTRICAL CHARACTERISTICS (continued)

(VDD = 2.7V to 3.6V (MAX5360); VDD = 4.5V to 5.5V (MAX5361); VDD = 2.7V to 5.5V (MAX5362); RL =10kΩ, CL = 50pF, TA = TMIN to

TMAX, unless otherwise noted. Typical values are TA = +25°C.)

PARAMETER

SYMBOL

CONDITIONS

MIN TYP MAX UNITS

POWER REQUIREMENTS

MAX5360

2.7

3.6

Supply Voltage

VDD MAX5361

MAX5362

4.5

5.5

V

2.7

5.5

Supply Current

IDD

No load, all digital inputs at 0 or VDD, code = 63

Shutdown mode

150

230

µA

1

DIGITAL INPUTS (SCL, SDA)

Input Low Voltage

VIL

Input High Voltage

VIH

0.7  VDD

0.3  VDD

V

V

Input Hysteresis

Vhys

0.05  VDD

V

Input Capacitance

CIN

Input Leakage Current

Ii

Pulse Width of Spike Suppressed tSP

DIGITAL OUTPUT (SDA) (open drain)

Output Low Voltage

VOL

Output Fall Time

tof

(Note 7)

ISINK = 3mA

ISINK = 6mA

VIH min to VIL max,

bus capacitance

10pF to 400pF

ISINK = 3mA

ISINK = 6mA

10

pF

±10

µA

0

50

ns

0

0.4

V

0

0.6

250

ns

250

TIMING CHARACTERISTICS

(VDD = 2.7V to 3.6V (MAX5360); VDD = 4.5V to 5.5V (MAX5361); VDD = 2.7V to 5.5V (MAX5362); RL =10kΩ, CL = 50pF, TA = TMAX to

TMIN, Figure 3, unless otherwise noted. Typical values are TA = +25°C.)

PARAMETER

SCL Clock Frequency

Bus-Free Time Between a

STOP and a START Condition

SYMBOL

fSCL

tBUF

CONDITIONS

MIN TYP MAX UNITS

0

400 kHz

1.3

µs

Hold Time (Repeated)

START Condition

tHD, STA

0.6

µs

Low Period of the SCL Clock

High Period of the SCL Clock

tLOW

tHIGH

1.3

µs

0.6

µs

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