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MAX5360(2001) Просмотр технического описания (PDF) - Maxim Integrated

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MAX5360 Datasheet PDF : 12 Pages
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Low-Cost, Low-Power 6-Bit DACs with
2-Wire Serial Interface in SOT23 Package
SDA
tSU, DAT
tLOW
tHD, DAT
SCL
tHD, STA
START CONDITION
tHIGH
tR
tF
Figure 3. Two-Wire Serial Interface Timing Diagram
tSU, STA
tHD, STA
REPEATED START CONDITION
tBUF
tSU, STO
STOP CONDITION START CONDITION
µC
SDA
SCL
SCL
VDD
RS*
MAX5360M
2V REFERENCE
SDA
OUT
VDD
OFFSET ADJUSTMENT
SCL
VDD
MAX5361N
4V REFERENCE
SDA
OUT
THRESHOLD ADJUSTMENT
SCL
VDD
MAX5362P
VDD REFERENCE
SDA
OUT
RS* IS OPTIONAL.
Figure 4. Typical Application Circuit
GAIN ADJUSTMENT
Power-On Reset
The MAX5360/MAX5361/MAX5362 have a power-on
reset circuit to set the DAC’s output to 0 when VDD is
first applied or when VDD dips below 1.7V. This ensures
that unwanted DAC output voltages will not occur
immediately following a system startup, such as after a
loss of power. The output glitch on startup is typically
<50mV.
Shutdown Mode
The MAX5360/MAX5361/MAX5362 include a software-
controlled shutdown mode that reduces the supply cur-
rent to <1µA. All internal circuitry is disabled and an
internal 10kresistor is placed from OUT to GND to
ensure 0V at OUT while in shutdown. The device enters
shutdown in less than 5µs and exits shutdown in less
than 50µs.
Digital Section
Serial interface
The MAX5360/MAX5361/MAX5362 use a simple two-
wire serial interface requiring only two I/O lines (two-
wire bus) of a standard microprocessor (µP) port.
Figure 3 shows the timing diagram for signals on the 2-
wire bus.
The two bus lines (SDA and SCL) must be high when
the bus is not in use. The MAX5360/MAX5361/
MAX5362 are receive-only devices (slaves) and must
be controlled by a bus master device. Figure 4 shows a
typical application where multiple devices can be con-
nected to the bus provided they have different address
settings. External pullup resistors are not necessary on
these lines (when driven by push-pull drivers), though
the MAX5360/MAX5361/MAX5362 can be used in
applications where pullup resistors are required (such
as in I2C systems) to maintain compatibility with exist-
ing circuitry. The serial interface operates at SCL rates
up to 400kHz. The SDA state is allowed to change only
while SCL is low, with the exception of START and
STOP conditions as shown in Figure 5. Each transmis-
sion consists of a START condition sent by the bus
master device, followed by the MAX5360/MAX5361/
MAX5362’s preset slave address, a power-mode bit,
_______________________________________________________________________________________ 9

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