MAX5195 Просмотр технического описания (PDF) - Maxim Integrated

Номер в каталоге

Компоненты Описание

производитель

MAX5195

14-Bit, 260Msps High-Dynamic Performance DAC

Maxim Integrated 

14-Bit, 260Msps High-Dynamic

Performance DAC

Detailed Description

Architecture

The MAX5195 is a high-performance, 14-bit, segmented

current-source array DAC (Figure 1) capable of operat-

ing with clock speeds up to 260MHz. The converter

consists of separate input and DAC registers, followed

by a current-source array. This current-source array is

capable of generating differential full-scale currents in

the range of 10mA to 20mA. An internal R2R resistor

network, in combination with external 27.4Ω termination

resistors, convert these differential output currents into a

differential output voltage with a peak-to-peak output

voltage range of 0.5V to 1V. An integrated 1.2V

bandgap reference, control amplifier, and user-selec-

table, external resistor determine the data converter’s

full-scale output range.

Internal Reference and Control Amplifier

The MAX5195 supports operation with the on-chip 1.2V

bandgap reference or an external reference voltage

source. REFIN serves as the input for an external refer-

ence source, and REFOUT provides a 1.2V output volt-

age, if the internal reference is used. For internal

reference operation, REFIN and REFOUT must be con-

nected together and decoupled to AGND with a 1µF

capacitor in parallel with a 0.1µF capacitor for stable

operation.

The MAX5195 reference circuit also employs a control

amplifier, designed to regulate the full-scale current IFS

for the differential current outputs of the MAX5195. For

stable operation, the output AMPOUT of this amplifier

must be bypassed with a 3kΩ resistor in parallel with a

1.5µF tantalum capacitor to AGND. Configured as a

voltage-to-current amplifier, the output current can be

calculated as follows:

IFS = 64 ✕ IREF - 1LSB

DVCC

DGND

REFOUT

REFIN

RSET

1.2V

REFERENCE

R2R

BIAS

NETWORK

CURRENT-SOURCE

ARRAY

AGND

AVCC

OUTP

OUTN

CLKN

CLKP

INPUT REGISTER

DECODER

INPUT LATCH

Figure 1. Simplified MAX5195 Block Diagram

14

D0N/D0P–D13N/D13P

MAX5195

_______________________________________________________________________________________ 9

Share Link: