DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

MAX5072ETJ Просмотр технического описания (PDF) - Maxim Integrated

Номер в каталоге
Компоненты Описание
производитель
MAX5072ETJ Datasheet PDF : 27 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
2.2MHz, Dual-Output Buck or Boost
Converter with POR and Power-Fail Output
PIN
11
12
13, 14
15
16
17
18
19
20
21, 22
23
24
25
26, 27
Pin Description (continued)
NAME
FUNCTION
OSC
Oscillator Frequency Set Input. Connect a resistor from OSC to SGND (ROSC) to set the switching
frequency (see the Oscillator section). Set ROSC for equal to or lower oscillator frequency than the SYNC
input frequency when using external synchronization (0.2fSYNC < fOSC < 1.2fSYNC). ROSC is still required
when an external clock is connected to the SYNC input.
V+
VL
BYPASS
MR
Input Supply Voltage. V+ voltage range from 5.5V to 23V. Connect the V+ and VL together for 4.5V to
5.5V input operation. Bypass with a minimum 0.1µF ceramic capacitor to SGND.
Internal 5.2V Linear Regulator Output. Use VL to drive the high-side switch at BST1/VDD1 and
BST2/VDD2. Bypass VL with a 0.1µF capacitor to PGND and a 4.7µF ceramic capacitor to SGND.
2.0V Output. Bypass to SGND with a 0.22µF or greater ceramic capacitor.
Active-Low Manual Reset Input. Drive MR low to initiate a reset. RST remains asserted while MR is low
and for 180ms (tRP) after MR returns high. MR requires no external debounce circuitry. MR is internally
pulled high by a 44kresistor and can be left open if not used.
RST
COMP1
FB1
Open-Drain Reset Output. RST remains low when either output voltage is below 92.5% of its regulation
point or while MR is low. After soft-start is completed and both outputs exceed 92.5% of their nominal
output voltage, RST becomes high impedance after a 180ms (typ) delay. RST remains high impedance
as long as both outputs maintain regulation.
Compensation Connection for Converter 1 (See the Compensation Section)
Feedback Input for Converter 1. Connect FB1 to a resistive divider between converter 1’s output and SGND
to program the output voltage. To set the output voltage below 0.8V, connect FB1 to a resistive voltage-
divider from BYPASS to regulator 1’s output (Figure 6). See the Setting the Output Voltage section.
EN1
Active-High Enable Input for Converter 1. Drive EN1 low to shut down converter 1, drive EN1 high for normal
operation. Use EN1 in conjunction with EN2 for supply sequencing. Connect to VL for always-on operation.
DRAIN1
Connection to the Converter 1 Internal MOSFET Drain.
Buck converter operation—use the MOSFET as a high-side switch and connect DRAIN1 to the input supply.
Boost converter operation—use the MOSFET as a low-side switch and connect DRAIN1 to the inductor
and diode junction.
Buck Converter Operation—Bootstrap Flying-Capacitor Connection for Converter 1. Connect BST1/VDD1
BST1/VDD1
to an external ceramic capacitor and diode according to the Standard Application Circuit (Figure 1).
Boost Converter Operation—Driver Bypass Capacitor Connection. Connect a low-ESR 0.1µF ceramic
capacitor from BST1/VDD1 to PGND (Figure 9).
FSEL1
Converter 1 Frequency Select Input. Connect FSEL1 to VL for normal operation. Connect FSEL1 to SGND
to reduce converter 1’s switching frequency to 1/2 converter 2’s switching frequency (converter 1
switching frequency will be 1/4 the SYNC frequency). Do not leave FSEL1 unconnected.
PGOOD1
Converter 1 Power-Good Output. Open-drain output goes low when converter 1’s output falls below
92.5% of its set regulation voltage. Use PGOOD1 and EN2 to sequence the converters.
Connection to the Converter 1 Internal MOSFET Source.
SOURCE1 Buck Converter Operation—connect SOURCE1 to the switched side of the inductor as shown in Figure 1.
Boost Converter Operation—connect SOURCE1 to PGND.
10 ______________________________________________________________________________________

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]