MAX3668 Просмотр технического описания (PDF) - Maxim Integrated

Номер в каталоге

Компоненты Описание

производитель

MAX3668

+3.3V, 622Mbps SDH/SONET Laser Driver with Automatic Power Control

Maxim Integrated 

+3.3V, 622Mbps SDH/SONET

Laser Driver with Automatic Power Control

Programming the APC Loop

When the MAX3668’s APC feature is used, program the

average optical power by adjusting the APCSET resis-

tor. To select this resistor, determine the desired moni-

tor current to be maintained over temperature and life.

Refer to the Monitor Diode Current vs. APC Set Resistor

graph in the Typical Operating Characteristics and

select the value of RAPCSET that corresponds to the

required current.

Interfacing with the Laser Diode

To minimize optical output aberrations due to the laser

parasitic inductance, an RC shunt network may be

used (see Typical Operating Circuit). If RL represents

the laser diode resistance, the recommended total

resistance for RD + RL is 10Ω. Starting values for coaxi-

al lasers are RFILT = 20Ω and CFILT = 5pF. RFILT and

CFILT should be experimentally adjusted to optimize

the output waveform. A bypass capacitor should also

be placed as close to the laser anode as possible for

best performance.

Pattern-Dependent Jitter (PDJ)

When transmitting NRZ data with long strings of consec-

utive identical digits (CID), LF droop can contribute to

pattern-dependent jitter. To minimize this pattern-depen-

dent jitter, two external components must be properly

chosen: capacitor CAPC, which dominates the APC loop

time constant; and AC-coupling capacitor CD.

To filter out noise effects and guarantee loop stability,

the recommended value for CAPC is 0.1µF. This results

in an APC loop bandwidth of 20kHz. Consequently, the

pattern-dependent jitter associated with an APC loop

time constant can be ignored.

The time constant associated with the DC blocking

capacitor on IMOD will have an effect on PDJ. It is

important that this time constant produce minimum

droop for long consecutive bit streams.

Referring to Figure 4, the droop resulting from long time

periods without transitions can be represented by the

following equation:

-t

(100% - DROOP) = e τ

AC coupling of IMOD results in a discharge level for τ

that is equal to PAVG. An overall droop of 6% relative to

Pp-p equates to a 12% droop relative to PAVG. To

ensure a droop of less than 12% (6% relative to Pp-p),

this equation can be solved for τ as follows:

τ

=

ln(1

-t

- 0.12)

=

7.8t

If t1 equals 80 consecutive unit intervals without a tran-

sition, the time constant associated with the DC block-

ing capacitor needs to be longer than:

τAC ≥ RACCD = 7.8 (80 bits) (1.6ns/bit) = 1.0µs

RFILT can be ignored for CFILT<< CD, therefore the

estimated value of RAC is:

RAC = 20Ω  (RD + rLASER)

Assuming RD = 5Ω, and rLASER = 5Ω:

RAC = 6.7Ω

with CD = 1.0µF, τAC = 6.7µs.

Input Termination Requirement

The MAX3668 data inputs are PECL-compatible.

However, it is not necessary to drive the MAX3668 with

a standard PECL signal. As long as the specified com-

mon-mode voltage and differential voltage swings are

met, the MAX3668 will operate properly.

Calculate Power Consumption

The total power dissipation of the MAX3668 can be esti-

mated by the following:

P = VCC × ICC + (VCC - Vf) × IBIAS

+ IMOD (VCC - 20Ω × IMOD / 2)

where IBIAS is the maximum bias current set by RBIAS-

MAX, IMOD is the modulation current, and Vf is the typi-

cal laser forward voltage.

Applications Information

The following is an example of how to set up the

MAX3668.

Select Laser

A communication-grade laser should be selected for

622Mbps applications. Assume the laser output aver-

age power is PAVE = 0dBm, the minimum extinction

Pp-p PAVG

Figure 4. Droop

τ=∞

τAC

τ << τAC

DROOP

t1

t

8 _______________________________________________________________________________________

Share Link: