M48T212A-85MH1 Просмотр технического описания (PDF) - STMicroelectronics
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M48T212A-85MH1 Datasheet PDF : 20 Pages
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M48T212A
Table 6. Capacitance (1)
(TA = 25 °C, f = 1 MHz)
Symbol
Parameter
CIN
Input Capacitance
COUT (2) Input/Output Capacitance
Note: 1. Sampled only, not 100% tested.
2. Outputs deselected.
Test Condition
VIN = 0V
VOUT = 0V
Min
Max
Unit
10
pF
10
pF
Table 7. DC Characteristics
(TA = 0 to 70°C; VCC = 3V to 3.6V)
Symbol
Parameter
Test Condition
Min
Typ
Max Unit
ILI (1,2) Input Leakage Current
0V ≤ VIN ≤ VCC
±1
µA
ILO (1) Output Leakage Current
0V ≤ VOUT ≤ VCC
±1
µA
ICC Supply Current
Outputs Open
4
10
mA
ICC1 Supply Current (Standby) TTL
E = VIH
3
mA
ICC2 Supply Current (Standby) CMOS
E = VCC –0.2
2
mA
Battery Current OSC ON
IBAT
Battery Current OSC OFF
575
800
nA
100
nA
VIL Input Low Voltage
–0.3
0.8
V
VIH Input High Voltage
2.0
VCC + 0.3 V
Output Low Voltage
VOL
Output Low Voltage (open drain) (3)
IOL = 2.1mA
IOL = 10mA
0.4
V
0.4
V
VOH Output High Voltage
IOH = –1.0mA
2.4
V
VOHB (4) VOH Battery Back-up
IOUT2 = –1.0µA
2.0
3.6
V
IOUT1 (5) VOUT Current (Active)
VOUT1 > VCC –0.3
70
mA
IOUT2 VOUT Current (Battery Back-up)
VOUT2 > VBAT –0.3
100
µA
VPFD Power-fail Deselect Voltage
2.7
2.9
3.0
V
VSO Battery Back-up Switchover Voltage
VPFD –100mV
V
VBAT Battery Voltage
3.0
V
VCAP Capacitor Voltage (6)
VCC
V
Note: 1. Outputs deselected.
2. RSTIN1 and RSTIN2 internally pulled-up to VCC through 100KΩ resistor. WDI internally pulled-down to VSS through 100KΩ resistor.
3. For IRQ/FT & RST pins (Open Drain).
4. Conditioned outputs (E1CON - E2CON) can only sustain CMOS leakage currents in the battery back-up mode. Higher leakage cur-
rents will reduce battery life.
5. External SRAM must match TIMEKEEPER Controller chip VCC specification.
6. When fully charged.
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