M40Z111MH1TR Просмотр технического описания (PDF) - STMicroelectronics

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производитель

M40Z111MH1TR

NVRAM CONTROLLER for up to TWO LPSRAM

STMicroelectronics 

M40Z111, M40Z111W

Table 6. Power Down/Up AC Characteristics

(TA = 0 to 70°C)

Symbol

tF (1)

tFB (2)

tR

Parameter

VPFD (max) to VPFD (min) VCC Fall Time

VPFD (min) to VSO VCC Fall Time

VPFD(min) to VPFD (max) VCC Rise Time

Min

Max

Unit

300

µs

10

µs

10

µs

tEDL

Chip Enable Propagation Delay

M40Z111

M40Z111W

15

ns

20

ns

tEDH

Chip Enable Propagation Delay

M40Z111

M40Z111W

10

ns

20

ns

tER

Chip Enable Recovery

40

200

ms

tWP

Write Protect Time

M40Z111

M40Z111W

40

150

µs

40

250

µs

Notes: 1. VPFD (max) to VPFD (min) fall time of less than tF may result in deselection/write protection not occurring until 200 µs after

VCC passes VPFD (min).

2. VPFD (min) to VSO fall time of less than tFB may cause corruption of RAM data.

Figure 5. Power Down Timing

VCC

VPFD (max)

VPFD

VPFD (min)

VSO

tF

E

ECON

tFB

tWPT

VOHB

AI02396

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