HMS30C7202N Просмотр технического описания (PDF) - MagnaChip Semiconductor
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HMS30C7202N Datasheet PDF : 179 Pages
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HMS30C7202N
9.5.4 External Signals ......................................................................................................................................... 90
9.5.5 Registers..................................................................................................................................................... 90
9.5.5.1 GCTRL................................................................................................................................................... 90
9.5.5.2 EPCTRL................................................................................................................................................. 90
9.5.5.3 INTMASK.............................................................................................................................................. 91
9.5.5.4 INTSTAT................................................................................................................................................ 91
9.5.5.5 PWR ....................................................................................................................................................... 92
9.5.5.6 DEVID ................................................................................................................................................... 92
9.5.5.7 DEVCLASS ........................................................................................................................................... 92
9.5.5.8 INTCLASS............................................................................................................................................. 92
9.5.5.9 SETUP0 / SETUP1 ................................................................................................................................ 94
9.5.5.10 ENDP0RD.......................................................................................................................................... 94
9.5.5.11 ENDP0WT ......................................................................................................................................... 94
9.5.5.12 ENDP1RD.......................................................................................................................................... 94
9.5.5.13 ENDP2WT ......................................................................................................................................... 94
10 SLOW AMBA PERIPHERALS .......................................................................................................................... 95
10.1 ADC INTERFACE CONTROLLER............................................................................................................................ 95
10.1.1 External Signals ......................................................................................................................................... 95
10.1.2 Registers..................................................................................................................................................... 95
10.1.2.1 ADC Control Register (ADCCR)....................................................................................................... 96
10.1.2.2 ADC Touch Panel Control Register (ADCTPCR).............................................................................. 96
10.1.2.3 ADC Battery check Control Register (ADCBACR)........................................................................... 97
10.1.2.4 ADC Sound Control Register (ADCSDCR)....................................................................................... 97
10.1.2.5 ADC Interrupt Status Register (ADCISR).......................................................................................... 97
10.1.2.6 ADC Tip Down Control Status Register (ADCTDCSR) .................................................................... 98
10.1.2.7 ADC Direct Control Register (ADCDIRCR) ..................................................................................... 98
10.1.2.8 ADC Direct Data Read Register (ADCDIRDATA)............................................................................ 98
10.1.2.9 ADC 1ST Touch Panel Data register.................................................................................................... 99
10.1.2.10 ADC 2ND Touch Panel Data Register ................................................................................................. 99
10.1.2.11 ADC Main Battery Data Register (ADCMBDATA) ........................................................................ 100
10.1.2.12 ADC Backup Battery Data Register (ADCBBDATA)...................................................................... 100
10.1.2.13 ADC Sound Data Register (ADCSDATA0 – ADCSDATA7)........................................................... 100
10.2 GPIO ................................................................................................................................................................ 102
10.2.1 External Signals ....................................................................................................................................... 102
10.2.2 Registers................................................................................................................................................... 102
10.2.2.1 ADATA............................................................................................................................................. 103
10.2.2.2 ADIR ................................................................................................................................................ 103
10.2.2.3 AMASK ........................................................................................................................................... 104
10.2.2.4 ASTAT.............................................................................................................................................. 104
10.2.2.5 AEDGE ............................................................................................................................................ 104
10.2.2.6 ACLR ............................................................................................................................................... 104
10.2.2.7 APOL ............................................................................................................................................... 104
10.2.2.8 GPIO PORT A Enable Register ........................................................................................................ 104
10.2.2.9 BDATA............................................................................................................................................. 105
10.2.2.10 BDIR ................................................................................................................................................ 105
10.2.2.11 BMASK............................................................................................................................................ 105
10.2.2.12 BSTAT.............................................................................................................................................. 105
10.2.2.13 BEDGE ............................................................................................................................................ 105
10.2.2.14 BCLK ............................................................................................................................................... 105
10.2.2.15 BPOL................................................................................................................................................ 105
10.2.2.16 GPIO PORT B Enable Register ........................................................................................................ 105
10.2.2.17 CDATA............................................................................................................................................. 105
10.2.2.18 CDIR ................................................................................................................................................ 105
10.2.2.19 CMASK............................................................................................................................................ 106
10.2.2.20 CBSTAT ........................................................................................................................................... 106
10.2.2.21 CEDGE ............................................................................................................................................ 106
10.2.2.22 CCLK ............................................................................................................................................... 106
10.2.2.23 CPOL................................................................................................................................................ 106
10.2.2.24 GPIO PORT C Enable Register ........................................................................................................ 106
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