GLT41116 Просмотр технического описания (PDF) - G-Link Technology

Номер в каталоге

Компоненты Описание

производитель

GLT41116

64k x 16 CMOS Dynamic RAM with Fast Page Mode

G-Link Technology  

GLT41116

1

2

3

4

5

6

7

8

9

10

tKHKH

CLK

tEVKH

CKE

tKHEX

tKHKL tKLKH

tCVKH

CE

tKHCX

ADV/LD

R/W

BWn

tAVKH

tKHAX

ADDRESS

A1

A2

tDVKH

tKHDX

D/Q

D (A1)

D (A2)

OE

A3

tKHQX1

tKHQV

D (A2+1)

A4

A5

Q (A3)

tKHQX

Q (A4)

tGHQZ

tGLQV

tKHQZ

Q (A4+1)

tGLQX

tKHQX

A6

D (A5)

A7

D (A6)

D (A7)

WRITE D(A1)

WRITE D(A2) BURST WRITE

D(A1+1)

READ Q(A3)

READ Q(A4)

BURST READ

Q(A4+1)

WRITE D(A5)

READ Q(A6)

WRITE D(A7)

DESELECT

NOTE:

Don’t Care

1. For this waveform, ZZ is tied LOW.

2. Burst sequence order is determined by MODE (0 = linear, 1 = interleaved). BURST operations are optional.

3. CE represents three signals. When CE = 0, it represents CE = 0, CE2 = 0, CE2 = 1.

4. Data coherency is provided for all possible operations. If a READ is initiated, the most current data is used. The most recent data may be from the input data register.

Figure 2. Read/Write Timing

Undefined

G-LINK Technology

7

July 1998 (Rev. 1)

Share Link: