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TMXF84622

155 Mbits/s/622 Mbits/s Interface SONET/SDH x84/x63 Ultramapper

Agere -> LSI Corporation 

TMXF84622 155 Mbits/s/622 Mbits/s Interface

SONET/SDH x84/x63 Ultramapper

Advance Data Sheet, Rev. 2

July 2001

2 The SONET/SDH Ultramapper

2.1 Overview

The SONET/SDH Ultramapper device integrates the SONET/SDH line, path, and tributary termination functions

with M13/E13 multiplex functions and the primary rate framing function. It is designed to drive either an OC-12/

STM-4 or OC-3/STM-1 optical signal directly or to allow for modular growth in terminal or add/drop applications.

The Ultramapper provides a versatile interface for all STS-12/STM-4, STS-3/STM-1, and STS-1 termination appli-

cations in point-to-point scenarios and for ring applications. This chip can be used in tributary shelf applications for

up to 84 T1 or J1 or 63 E1 line cards, providing all possible mappings into SONET/SDH, because of the flexibility of

the mappings, software upgrades from M13/E13 mapped connections to VT/TU mapped connections are possible.

This device can also be used for DS3/E3/DS2 applications.

A single Ultramapper is capable of processing the aggregate bandwidth of one STS-3/STM-1 to 84/63 DS1/E1s.

Further, a single Ultramapper can process the aggregate bandwidth of two STS-3/STM-1s, terminated as an STS-

12/STM-4, to six DS3/E3s. Additionally, a single Ultramapper can function as an STS-12/STS-3/STM-4/STM-1

add-drop MUX by terminating up to three STS-1/STM-0 channels or one AU-4 channel and using the internal

pointer processors to forward any nonterminated channels. By communicating to three other mate devices via the

serial STS-3/STM-1 link interface, it is capable of terminating a full STS-12/STM-4 signal.

X12/X4 SONET/SDH

ADM FRONT END

HIGH-SPEED IF

4

622 Mbits/STS12/

STM4

155 Mbits/STS-3/

STM-1

CDR

TMUX

STSPP

S

STS12/

T

CLOCK/SYNC 11

STM4/

S

STS3/

X

STM1

C

MSP 1 + 1

4

622 Mbits/STS12/

STM4

155 Mbits/STS-3/

STM-1

CDR

JTAG

MPU

CDR

STS1LT

(X3)

SPEMPR

(X3)

(0—2)

SPEMPR

(X3)

(3—5)

X8/X63 PDH

TRIBUTARY TERMINATION

FRM

X84/X63

DS1/J1/E1

5

RX/TX CLKS AND SYNC

8

PLL INTERFACE

TPG/TPM

(X3)

X28/X21

VTMPR

(X3)

M13/E13

MUX

SYSTEM

INTERFACES

42

(X6) DS3/E3

(X3) STS1

MRXC

DS1/J1/E1

VT/TU

DS2/E2

DS3/E3

24

(X3) NSMI

(X3) STS1

204

SHARED LOW-SPEED I/O

SWITCHING MODES:

PSB (X16—X48/X63 DS1/J1/E1

X2016 DS0/E0

CHI (X42—X2016 DS0/E0

TRANSPORT MODES:

X6

DS3/E3

DJA

X84/X63

DS1/E1

DJA

DS1/J1/E1 (X30—x28/x21 + PROT.

DS2/E2 (X30—x21/x12 + PROT.

VT/TU/(X30—X28/X21 + PROT.

JTAG IF

MPU IF

(X3)

(X3) (X3)

STS3/STM1 DS3/E3 PLL IF

MATE

(OPTIONAL)

INTERCONNECT

LOPOH

(SUPPORTS UPSR)

TOAC POAC

Figure 1. Functional Diagram of Ultramapper

2351(F)

8

Agere Systems Inc.

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