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DS2408 Просмотр технического описания (PDF) - Maxim Integrated

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DS2408
MaximIC
Maxim Integrated MaximIC
DS2408 Datasheet PDF : 36 Pages
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DS2408
Conditional Search Channel Selection Mask Register
The data in this register controls whether a PIO channel qualifies for participation in the conditional
search command. To include one or more of the PIO channels, the bits in this register that correspond to
those channels need to be set to 1. This register can only be written through the Write Conditional Search
Registers command.
Conditional Search Channel Selection Mask Register Bitmap
ADDR b7
b6
b5
b4
b3
b2
b1
b0
008Bh SM7 SM6 SM5 SM4 SM3 SM2 SM1 SM0
This register is read/write. Each bit is associated with the respective PIO channel as shown in Figure 7.
This register is cleared to 00h by a power-on reset
Conditional Search Channel Polarity Selection Register
The data in this register specifies the polarity of each selected PIO channel for the device to respond to
the conditional search command. Within a PIO channel, the data source may be either the channel's input
signal (pin) or the channel's activity latch, as specified by the PLS bit in the Control/Status register at ad-
dress 008Dh. This register can only be written through the Write Conditional Search Registers command.
Conditional Search Channel Polarity Selection Register Bitmap
ADDR b7
b6
b5
b4
b3
b2
b1
b0
008Ch SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0
This register is read/write. Each bit is associated with the respective PIO channel as shown in Figure 7.
This register is cleared to 00h by a power-on reset.
Figure 7. Conditional Search Logic
PLS CHANNEL 0 SP0
SM0
CT
AL0
P0
CHANNEL 7
INPUT FROM
CHANNELS 1 TO 6
(NOT SHOWN)
SP7
SM7
CSR
AL7
P7
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