CXK77B3610GB
• AC Electrical Characteristics
Item
Symbol
Address access (except Register-Register mode)
tAA
Clock period
tKP
Clock pulse high
tKH
Clock pulse low
tKL
Setup time
tS
Hold time
tH
Clock high to output (R-R mode)
tKQ
Clock high to output (R-F mode, R-L mode)
tKQ1
Clock low to output (R-L mode)
tKQ2
Write cycle clock high to following Read cycle output
(R-F mode, R-L mode)
tKQ3
Clock high to output high impedance (S deselect cycle) tHZ∗2
Write cycle clock high to output high impedance
(R-F mode, R-L mode)
tWHZ∗2
Clock high to output low impedance
(R-R mode)
tLZ∗2
Clock high to output low impedance
(R-F mode)
tLZ1∗2
Clock low to output low impedance (R-L mode)
tLZ2∗2
Output enable to output valid (G)
tOE
Output enable to output in low Z (G)
tOLZ∗2
Output disable to output in high Z (G)
tOHZ∗2
∗1 All parameters are specified over the range 0 to 70°C.
∗2 These parameters are sampled and are not 100% tested.
-6
-7
Unit
Min. Max. Min. Max.
—
9
— 10 ns
6
—
7
— ns
2
—
3
— ns
2
—
3
— ns
0.5 —
1
— ns
1
—
1
— ns
1.5∗2 3 1.5∗2 3.5 ns
—
6
—
7
ns
1.5∗2 3 1.5∗2 3.5 ns
15
17 ns
1.5 3 1.5 3.5 ns
1.5 3 1.5 3.5 ns
1.5 — 1.5 — ns
2
—
2
— ns
1.5 — 1.5 — ns
—
3
— 3.5 ns
1
—
1
— ns
—
3
— 3.5 ns
AC characteristics
• AC test conditions (VDD = 3.3V ± 0.15V, Ta = 0 to 70°C)
Item
Conditions
Output Load (1)
Output Load (2) ∗2
Input pulse high level
Input pulse low level
Input rise & fall time
VIH = 2.4V
VIL = 0.4V
I/O
50Ω
1V/ns
50Ω
3.3V
I/O
1178Ω
Input reference level
Clock input reference level
Clock input differential signal
Clock input rise & fall time
Output reference level
2.0/0.8V
K/K cross;
C/C cross
0.8V
1V/ns
1.4V
1.4V
5pF∗1
868Ω
∗1 Including scope and jig capacitance.
∗2 For tLZ, tHZ.
Fig. 1.
Output load conditions
Fig. 1
–6–