CDP1821C Просмотр технического описания (PDF) - Intersil
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CDP1821C Datasheet PDF : 7 Pages
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CDP1821C/3
Write Cycle Dynamic Electrical Specifications tR, tF = 10ns, CL = 50pF
PARAMETER
SYMBOL
VDD
(V)
-55oC, +25oC
MIN
MAX
+125oC
MIN
MAX
Write Cycle Time
tWC
5
300
-
420
-
Address Setup Time (Note 1)
tAS
5
60
-
84
-
Address Hold Time (Note1)
tAH
5
130
-
180
-
Input Data Setup Time (Note 1)
tDS
5
90
-
125
-
Input Data Hold Time (Note 1)
tDH
5
60
-
84
-
Read/Write Pulse Width Low (Note 1)
tWL
5
110
-
155
-
NOTE:
1. 100% testing. All other limits are designer’s parameters under given test conditions and do not represent 100% testing.
UNITS
ns
ns
ns
ns
ns
ns
CS
(NOTE 1)
(NOTE 2)
A0 - A9
R/W
(NOTE 3)
tAS
DI
(NOTE 3)
tWC
tWL
tDS
tAH
tDH
(NOTE 3)
NOTES:
1. Chip-Select (CS) permitted to change from high to low level or remain low on a selected device.
2. Chip-Select (CS) permitted to change from low to high level or remain low.
3. Don’t care.
FIGURE 2. WRITE CYCLE TIMING DIAGRAM
6-9
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