CC1110FX Просмотр технического описания (PDF) - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS

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CC1110FX

Low-power sub-1 GHz RF System-on-Chip (SoC) with MCU, memory, transceiver, and USB controller

TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS 

CC1110Fx / CC1111Fx

7.2 RF Receive Section

TA = 25 °C, VDD = 3.0 V if nothing else stated. All measurement results are obtained using the

CC1110EM reference design ([1]) if nothing else is stated.

Parameter

Digital channel

filter bandwidth

Min Typ Max Unit Condition/Note

58

812 kHz User programmable (see section 14.6). The bandwidth limits are

proportional to crystal frequency (given values assume a 26MHz system

clock).

315 MHz, 1.2 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0

(GSK, 1% packet error rate, 20 bytes packet length, 5.2 kHz deviation, 58 kHz digital channel filter bandwidth)

Receiver

sensitivity

-110

-112

dBm System clock running at 26 MHz

dBm System clock running at 24MHz

The RX current consumption can be reduced by approximately 2.0 mA

by setting MDMCFG2.DEM_DCFILT_OFF=1. The typical sensitivity is then

-107 dBm.

315 MHz, 38.4 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0

(GSK, 1% packet error rate, 20 bytes packet length, 20 kHz deviation, 100 kHz digital channel filter bandwidth)

Receiver

sensitivity

-102

-103

dBm System clock running at 26 MHz

dBm System clock running at 24MHz

The RX current consumption can be reduced by approximately 2.1 mA

by setting MDMCFG2.DEM_DCFILT_OFF=1. The typical sensitivity is then

-99 dBm.

315 MHz, 250 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0 (MDMCFG2.DEM_DCFILT_OFF=1

cannot be used for data rates > 100 kBaud)

(GSK, 1% packet error rate, 20 bytes packet length, 127 kHz deviation, 540 kHz digital channel filter bandwidth)

Receiver

sensitivity

-94

dBm System clock running at 26 MHz

-94

dBm System clock running at 24MHz

433 MHz, 1.2 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0

(GSK, 1% packet error rate, 20 bytes packet length, 5.2 kHz deviation, 58 kHz digital channel filter bandwidth)

Receiver

sensitivity

-110

-110

dBm

dBm

System clock running at 26 MHz

System clock running at 24MHz

The RX current consumption can be reduced by approximately 2.6 mA

by setting MDMCFG2.DEM_DCFILT_OFF=1. The typical sensitivity is then

-107 dBm.

433 MHz, 38.4 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0

(GSK, 1% packet error rate, 20 bytes packet length, 20 kHz deviation, 100 kHz digital channel filter bandwidth)

Receiver

sensitivity

-102

-101

dBm

dBm

System clock running at 26 MHz

System clock running at 24MHz

The RX current consumption can be reduced by approximately 2.7 mA

by setting MDMCFG2.DEM_DCFILT_OFF=1. The typical sensitivity is then

-99 dBm.

Parameter

Min Typ Max Unit Condition/Note

433 MHz, 250 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0 (MDMCFG2.DEM_DCFILT_OFF=1

cannot be used for data rates > 100 kBaud)

(GSK, 1% packet error rate, 20 bytes packet length, 127 kHz deviation, 540 kHz digital channel filter bandwidth)

-95

Receiver

sensitivity

-93

System clock running at 26 MHz

System clock running at 24MHz

See Table 9 for typical variation over operating conditions

SWRS033E

Page 14 of 239

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