4C4M4EOQ-50TC Просмотр технического описания (PDF) - Alliance Semiconductor

Номер в каталоге

Компоненты Описание

производитель

4C4M4EOQ-50TC

4M X 4 CMOS Quad CAS DRAM (EDO) family

Alliance Semiconductor 

AS4C4M4EOQ

AS4C4M4E1Q

®

DC electrical characteristics (AS4LC4M4E0/E1)

Parameter

Symbol Test conditions

Input leakage current IIL

0V ≤ Vin ≤ VCC (max)

Pins not under test = 0V

Output leakage current IOL

DOUT disabled, 0V ≤ Vout ≤ VCC

(max)

Operating power

supply current

ICC1

TTL standby power

supply current

ICC2

Average power supply

current, RAS refresh ICC3

mode or CBR

RAS, UCAS, LCAS, Address cycling;

tRC=min

RAS = UCAS = LCAS ≥ VIH,

all other inputs at VIH or VIL

RAS cycling, UCAS = LCAS ≥ VIH,

tRC = min of RAS low after XCAS low.

EDO page mode

average power supply ICC4

current

RAS = VIL, UCAS or LCAS,

address cycling: tHPC = min

CMOS standby power

supply current

ICC5

RAS = UCAS = LCAS = VCC - 0.2V,

F=0

Output voltage

VOH

VOL

CAS before RAS refresh

current

ICC6

IOUT = -2.0 mA

IOUT = 2 mA

RAS, UCAS or LCAS cycling, tRC =

min

RAS = UCAS = LCAS ≤ 0.2V,

Self refresh current

ICC7

WE = OE = VCC - 0.2V,

all other inputs at 0.2V or VCC -

0.2V

-50

Min Max

-5 +5

-5 +5

–

85

– 2.0

–

80

–

85

– 200

2.4 –

– 0.4

–

80

– 0.3

-60

Min Max Unit Notes

-5 +5 µA

-5 +5 µA

–

75 mA 4,5

– 2.0 mA

–

70 mA

4

–

75 mA 4, 5

– 200 µA

2.4 –

V

– 0.4 V

–

70 mA

–

0.3 mA

3/22/01; v.1.0

Alliance Semiconductor

P. 5 of 16

Share Link: