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APU3146

DUAL SYNCHRONOUS PWM CONTROLLER WITH CURRENT SHARING CIRCUITRY AND AUTO-RESTART

Advanced Power Electronics Corp 

APU3146

DEADBAND TIME

Tr

Tf

90%

High Side

Driver HD 2V

10%

90%

Tr

Tf

Low Side

Driver LD

2V

10%

Deadband

H_to_L

Deadband

L_to_H

Figure 2 - Deadband time definition.

TDB(TYP)=(Deadband H_toL+Deadband L_to -H)/2

PIN DESCRIPTIONS

PIN# PIN SYMBOL PIN DESCRIPTION

1

PGood

Power Good pin. Low when any of the outputs fall 10% below the set voltages.

2

Vcc

Supply voltage for the internal blocks of the IC.

3

VOUT3

Output of the internal LDO.

4

Rt

Switching frequency setting resistor. (see Figure 10 for selecting resistor values).

5,23 VSEN2, VSEN1 Sense pins for OVP and PGood. For 2-Phase operation tie these pins together.

6,22 Fb2,Fb1 Inverting inputs to the error amplifiers. In current sharing mode, Fb1 is connected to a

resistor divider to set the output voltage and Fb2 is connected to programming resistor to

achieve current sharing. In independent 2-channel mode, these pins work as feedback

inputs for each channel.

7,21 Comp2, Comp1 Compensation pins for the error amplifiers.

These pins provide soft-start for the switching regulator. An internal current source charges

8

SS2 / SD external capacitors that are connected from these pins to ground which ramp up the

20

SS1 / SD output of the switching regulators, preventing them from overshooting as well as limiting

the input current. The converter can be shutdown by pulling these pins below 0.3V.

9,19 OCSet2,OCSet1 Current limit resistor (RLIM) connection pins for output 1 and 2. The other ends of RLIMs are

connected to the corresponding switching nodes.

10,18 VcH2, VcH1 Supply voltage for the high side output drivers. These are connected to voltages that must

be typically 6V higher than their bus voltages. A 1µF high frequency capacitor must be

connected from these pins to GND to provide peak drive current capability.

11,17 HDrv2, HDrv1 Output drivers for the high side power MOSFETs. 1)

12,16 PGnd2, PGnd1 These pins serve as the separate grounds for MOSFET drivers and should be connected

to the system’s ground plane.

13,15 LDrv2, LDrv1 Output drivers for the synchronous power MOSFETs.

14

VCL

Supply voltage for the low side output drivers. This pin should be high for normal operation

24

Sync

The internal oscillator may be synchronized to an external clock via this pin.

25

Hiccup

When pulled High, it puts the device current limit into a hiccup mode. When pulled Low,

the output latches off, after an overcurrent event.

4/29

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