74LVC132A(2006) Просмотр технического описания (PDF) - NXP Semiconductors.
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74LVC132A Datasheet PDF : 15 Pages
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NXP Semiconductors
74LVC132A
Quad 2-input NAND Schmitt trigger
11. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7.
Symbol Parameter
Conditions
−40 °C to +85 °C
Min Typ[1] Max
tpd
propagation delay
nA, nB to nY; see Figure 6 [2]
VCC = 1.2 V
-
18.0
-
VCC = 1.65 V to 1.95 V
2.0 7.2 12.8
VCC = 2.3 V to 2.7 V
1.5 4.0 7.6
VCC = 2.7 V
1.5 3.8 7.6
tsk(o)
CPD
output skew time
power dissipation
capacitance
VCC = 3.0 V to 3.6 V
1.5 3.4 6.4
[3]
-
-
1.0
per buffer; VI = GND to VCC [4]
VCC = 1.65 V to 1.95 V
-
10.5
-
VCC = 2.3 V to 2.7 V
-
10.8
-
VCC = 3.0 V to 3.6 V
-
11.4
-
−40 °C to +125 °C Unit
Min Max
-
- ns
2.0
16.0 ns
1.5
9.6 ns
1.5
9.6 ns
1.5
8.0 ns
-
1.5 ns
-
- pF
-
- pF
-
- pF
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.
[2] tpd is the same as tPLH and tPHL.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
12. Waveforms
nA, nB input
VM
tPHL
tPLH
nY output
VM
VM = 1.5 V at VCC ≥ 2.7 V.
VM = 0.5 × VCC at VCC < 2.7 V.
VOL and VOH are typical output voltage drops that occur with the output load.
Fig 6. The input (nA, nB) to output (nY) propagation delays
mna213
74LVC132A_1
Product data sheet
Rev. 01 — 15 December 2006
© NXP B.V. 2006. All rights reserved.
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