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BH162827ADL

20-bit buffer/line driver, non-inverting, with 30
termination resistors (3-State)

Philips Electronics 

Philips Semiconductors

20-bit buffer/line driver, non-inverting,

with 30W termination resistors (3-State)

Product specification

74ABT162827A

74ABTH162827A

RECOMMENDED OPERATING CONDITIONS

SYMBOL

PARAMETER

VCC

VI

VIH

VIL

IOH

IOL

∆t/∆v

Tamb

DC supply voltage

Input voltage

High-level input voltage

Low-level Input voltage

High-level output current

Low-level output current

Input transition rise or fall rate

Operating free-air temperature range

LIMITS

MIN

MAX

4.5

5.5

0

VCC

2.0

0.8

–32

12

0

10

–40

+85

UNIT

V

V

V

V

mA

mA

ns/V

°C

DC ELECTRICAL CHARACTERISTICS

LIMITS

SYMBOL

PARAMETER

TEST CONDITIONS

Tamb = +25°C

Tamb = -40°C

to +85°C

UNIT

MIN TYP MAX MIN MAX

VIK

Input clamp voltage

VCC = 4.5V; IIK = -18mA

–0.9 –1.2

–1.2 V

VCC = 4.5V; IOH = -3mA; VI = VIL or VIH

2.5 3.1

2.5

V

VOH

High-level output voltage

VCC = 5.0V; IOH = -3mA; VI = VIL or VIH

3.0 3.6

3.0

V

VCC = 4.5V; IOH = -32mA; VI = VIL or VIH

2.0 2.7

2.0

V

VOL

Low-level output voltage

VCC = 4.5V; IOH = 8mA; Vl = VIL or VIN

VCC = 4.5V; IOL = 12mA; VI = VIL

0.65

0.65 V

0.80

0.80 V

II

Input leakage current

VCC = 5.5V; VI = GND or 5.5V

±0.01 ±1.0

±1.0 µA

VCC = 5.5V; VI = 5.5V

0.01 1

1

µA

II

Input leakage current

74ABTH162827A

VCC = 5.5V; VI = VCC or GND

VCC = 5.5V; VI = VCC

VCC = 5.5V; VI = 0

Control

pins

Data pins4

±0.01 ±1

0.01 1

–1

–3

±1

µA

1

µA

–5

µA

IHOLD

Bus Hold current A inputs5

74ABTH162827A

VCC = 4.5V; VI = 0.8V

VCC = 4.5V; VI = 2.0V

VCC = 5.5V; VI = 0 to 5.5V

35

–75

±800

35

–75

µA

IOFF Power-off leakage current VCC = 0.0V; VO = 4.5V; VI = 0V or 5.5V

±5.0 ±100

±100 µA

IPU/IPD

Power-up/down 3-State

output current3

VCC = 2.1V; VO = 0.5V; VI = GND or VCC;

V OE = Don’t care

±5.0 ±50

±50 µA

IOZH 3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or VIH

1.0 10

10

µA

IOZL

3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or VIH

–1.0 –10

–10 µA

ICEX

Output High leakage

current

VCC = 5.5V; VO = 5.5V; VI = GND or VCC

1.0 50

50

µA

IO

Output current1

VCC = 5.5V; VO = 2.5V

–50 –70 –180 –50 –180 mA

ICCH

VCC = 5.5V; Outputs High, VI = GND or

VCC

0.5

1

1

mA

ICCL Quiescent supply current VCC = 5.5V; Outputs Low, VI = GND or VCC

9

19

19 mA

ICCZ

VCC = 5.5V; Outputs 3-State;

VI = GND or VCC

0.5

1

1

mA

∆ICC

Additional supply current

per input pin2

VCC = 5.5V; one input at 3.4V,

other inputs at VCC or GND

0.2

1

1

mA

NOTES:

1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.

2. This is the increase in supply current for each input at 3.4V.

3. This parameter is valid for any VCC between 0V and 2.1V with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10% a

transition time of up to 100µsec is permitted.

4. Unused pins at VCC or GND.

5. This is the bus hold overdrive current required to force the input to the opposite logic state.

1998 Feb 27

5

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