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SI1404DH Просмотр технического описания (PDF) - Vishay Semiconductors

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SI1404DH
Vishay
Vishay Semiconductors Vishay
SI1404DH Datasheet PDF : 3 Pages
1 2 3
SPICE Device Model Si1404DH
Vishay Siliconix
N-Channel 25-V (D-S) MOSFET
CHARACTERISTICS
N-Channel Vertical DMOS
Macro Model (Subcircuit Model)
Level 3 MOS
Apply for both Linear and Switching Application
Accurate over the 55 to 125°C Temperature Range
Model the Gate Charge, Transient, and Diode Reverse Recovery
Characteristics
DESCRIPTION
The attached spice model describes the typical electrical
characteristics of the n-channel vertical DMOS. The subcircuit
model is extracted and optimized over the 55 to 125°C
temperature ranges under the pulsed 0 to 5V gate drive. The
saturated output impedance is best fit at the gate bias near the
threshold voltage.
A novel gate-to-drain feedback capacitance network is used to model
the gate charge characteristics while avoiding convergence difficulties
of the switched Cgd model. All model parameter values are optimized
to provide a best fit to the measured electrical data and are not
intended as an exact physical interpretation of the device.
SUBCIRCUIT MODEL SCHEMATIC
This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate
data sheet of the same number for guaranteed specification limits.
Document Number: 73120
27-Aug-04
www.vishay.com
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