FDC37C93 Просмотр технического описания (PDF) - SMSC -> Microchip

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FDC37C93

Plug and Play Compatible Ultra I/O™ Controller with Soft Power Management

SMSC -> Microchip 

DESCRIPTION OF PIN FUNCTIONS

PIN NO.

NAME

SYMBOL

PROCESSOR/HOST INTERFACE

72:79

41:52

System Data Bus

System Address Bus

SD[0:7]

SA[0:11]

53

Chip Select/SA12 (Active Low)(Note 1, 4)

70

Address Enable (DMA master has bus control)

nCS

AEN

90

I/O Channel Ready

IOCHRDY

80

67:61,

59:54

Reset Drive

Interrupt Requests [1,3:12,14,15]

(Polarity control for IRQ8)

RESET_DRV

IRQ[1,3:12,

14,15]

82,84, DMA Requests

86,88

DRQ[0:3]

81,83,

85,87

89

DMA Acknowledge

Terminal Count

nDACK[0:3]

TC

68

I/O Read

nIOR

69

I/O Write

35

High Speed Clock Out 24/48 MHz

nIOW

HCLK

36

16 MHz Out

16CLK

22

14.318 MHz Clock Input

37

14.318 MHz Clock Output 1

CLOCKI

CLKO1

38

14.318 MHz Clock Output 2

39

14.318 MHz Clock Output 3

CLKO2

CLKO3

POWER PINS

21, 60, +5V Supply Voltage

101, 125,

139

VCC

32

1, 8, 40,

71, 95,

123, 130

Trickle Voltage Input

Ground

VTR

GND

FDD INTERFACE

17

Read Disk Data

nRDATA

BUFFER

TYPE

I/O24

I

I

I

OD24

IS

024/OD24

(Note 0)

O24

I

I

I

I

O20

O8SR

ICLK

O16SR

O8SR

O8SR

IS

6

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