FDC37N958FR Просмотр технического описания (PDF) - SMSC -> Microchip

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FDC37N958FR

Notebook I/O Controller with Enhanced Keyboard and System Control

SMSC -> Microchip 

PinPin

PIN #

80:82,

84:88

54:69

96

79

95

91,93

202, 201

90, 92

207, 208

94

77

78

97

98

70

71

72

74

75

76

161:166,

168:169

170:175,

177:180

182

NAME

DESCRIPTION OF PIN FUNCTIONS

SUPPLY

DESCRIPTION

VOLTAGE

TYPE

SD[0:7]

HOST (ISA) INTERFACE

System Data Bus

VCC2

SA[0:15]

System Address Bus

nROMCS

ROM Chip Select

AEN

Address Enable (DMA master has

bus control)

IOCHRDY

I/O Channel Ready

DRQ[0:1]

DMA Requests

DRQ[2:3]/

OUT[8:9]

DMA Requests/GP Outputs

nDACK[0:1]

DMA Acknowledge

nDACK[2:3]/

DMA Acknowledge/GPIO 18,19

GPIO18, 19

TC

Terminal Count

nIOR

I/O Read

nIOW

I/O Write

nMEMRD

Memory Read

nMEMWR

Memory Write

IRQ6(FDC)/

Floppy Disk Interrupt Request/

OUT0

Generic Output 0

nIRQ8/

Active low Interrupt Request 8/

OUT1

Generic Output 1

IRQ7(PP)/

Parallel Port Interrupt Request/

OUT2

Generic Output 2

IRQ12(M)/

Mouse Interrupt Request/

OUT3

Generic Output 3

IRQ1(KB)/

Keyboard Interrupt Request/

OUT4

Generic Output 4

nNOWS

No Wait State

FLASH ROM/ MEMORY MAP INTERFACE

FAD[7:0]

Flash Address/Data[7:0] Bus

VCC2

VCC2

VCC2

VCC2

VCC2

VCC2

VCC2

VCC2

VCC2

VCC2

VCC2

VCC2

VCC2

VCC2

VCC2

VCC2

VCC2

VCC2

VCC2

VCC1

FA[8:17]

Flash Address[17:8]

VCC1

nFRD

Flash Memory Read

VCC1

I/O24

I

I

I

OD24

O24

O24

I

I/IO8

I

I

I

I

I

O24

O24

O24

O24

O24

OD24

I/O8

O8

O8

SMSC DS – FDC37N958FR

Page 3

Rev. 09/01/99

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