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KE5BGCA256A Просмотр технического описания (PDF) - KAWASAKI MICROELECTRONICS

Номер в каталоге
Компоненты Описание
производитель
KE5BGCA256A
K-micro
KAWASAKI MICROELECTRONICS K-micro
KE5BGCA256A Datasheet PDF : 114 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
1. Features
The KE5BGCA256 provides best solution to the fast "Ad-
dress Filtering" requirements of today's internetworking
switching equipment with the following outstanding func-
tions.
GigabitCAM KE5BGCA256
• Synchronous Operation
- 30ns cycle time
- 64-bit input/30ns
- Search, data read/write, and command operations
are executed at high speed.
• 256k-bit capacity of table
- 64-bit x 4096 entries
- CAM/RAM substitution
• 128-pin SQFP Package
• 3.3 v CMOS technology
• Dual Port Architecture
- 32-bit I/O Port
- 16-bit Output Port
• 12 Search Conditions
-12 Mask registers selected by the external pins
(MS<3:0>) and the CNTL1 register
- Access bit can be set for data aging
- Permanent bit can be set for permanent entry
- Automatic output of the contents of the Hit entry and
the Empty entry address from the 16-bit Output Port
• Cascading
- Table size is expandable.
- A cascaded table acts as one integral search data table
by internal device priority control.
• Commands
- Useful commands for table management such as aging
and purging.
- Useful command for Source Address Learning
Preliminary
1-1

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