KE5BLME064 Просмотр технического описания (PDF) - KAWASAKI MICROELECTRONICS

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производитель

KE5BLME064

Longest Match Engine

KAWASAKI MICROELECTRONICS 

Kawasaki LSI

64K Longest Match Search Engine (KE5BLME064)

PRELIMINARY

Pin Name Attribute

Description

#of

Pins

MOE2N SRAM2 Output Enable

MOE2N is SRAM2 Output Enable signal.

1

Output

Ensure that it is connected to SRAM2

LVTTL

output enable input.

MBWE2N SRAM2 Byte Write Enable

MBWE2N is SRAM2 Byte Write Enable

1

Output

signal. Ensure that it is connected to

LVTTL

SRAM2 Byte write enable input.

MBWA2N SRAM2 Synchronous Byte Write Enable MBWA2N is SRAM2 Synchronous Byte Write 1

Output

Enable signal. Ensure that it is connected to

LVTTL

SRAM2 Synchronous Byte write enable A input.

MBWB2N SRAM2 Synchronous Byte Write Enable MBWB2N is SRAM2 Synchronous Byte Write 1

Output

Enable signal. Ensure that it is connected to

LVTTL

SRAM2 Synchronous Byte write enable B input.

MBWC2N SRAM2 Synchronous Byte Write Enable MBWC2N is SRAM2 Synchronous Byte Write 1

Output

Enable signal. Ensure that it is connected to

LVTTL

SRAM2 Synchronous Byte write enable C input.

MBWD2N SRAM2 Synchronous Byte Write Enable MBWD2N is SRAM2 Synchronous Byte Write 1

Output

Enable signal. Ensure that it is connected to

LVTTL

SRAM2 Synchronous Byte write enable D input.

MADD3 SRAM3 Address

MADD3 is SRAM3 address output.

16

<15:0> Output

Ensure that it is connected to SRAM3

LVTTL

address pins.

MDAT3 SRAM3 Data Bus

MDAT3 is a bi-directional Bus for SRAM3.

32

<31:0> Input/Output

Ensure that it is connected to SRAM3

LVTTL

data pins.

MCS3N SRAM3 Chip Enable

MCS3N is SRAM3 chip enable signal.

1

Output

Ensure that it is connected to SRAM3

LVTTL

chip enable.

MOE3N SRAM3 Output Enable

MOE3N is SRAM3 Output Enable signal.

1

Output

Ensure that it is connected to SRAM3

LVTTL

output enable input.

MBWE3N SRAM3 Byte Write Enable

MBWE3N is SRAM3 Byte Write Enable

1

Output

signal. Ensure that it is connected to

LVTTL

SRAM3 Byte write enable input.

MBWA3N SRAM3 Synchronous Byte Write Enable MBWA3N is SRAM3 Synchronous Byte Write 1

Output

Enable signal. Ensure that it is connected to

LVTTL

SRAM3 Synchronous Byte write enable A input.

MBWB3N SRAM3 Synchronous Byte Write Enable MBWB3N is SRAM3 Synchronous Byte Write 1

Output

Enable signal. Ensure that it is connected to

LVTTL

SRAM3 Synchronous Byte write enable B input.

MBWC3N SRAM3 Synchronous Byte Write Enable MBWC3N is SRAM3 Synchronous Byte Write 1

Output

Enable signal. Ensure that it is connected to

LVTTL

SRAM3 Synchronous Byte write enable C input.

MBWD3N SRAM3 Synchronous Byte Write Enable MBWD3N is SRAM3 Synchronous Byte Write 1

Output

Enable signal. Ensure that it is connected to

LVTTL

SRAM3 Synchronous Byte write enable D input.

VDD

Supply

The voltage required is 3.3V.

24

GND

Ground

Ground pin.

49

Version 2.5.4

Proprietary and Confidential

8

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