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R5F7131 Просмотр технического описания (PDF) - Renesas Electronics

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R5F7131 Datasheet PDF : 1184 Pages
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3.3.3 Mode 3 (Single Chip Mode) ................................................................................... 51
3.4 Address Map ........................................................................................................................ 52
3.5 Initial State in This LSI........................................................................................................ 56
3.6 Note on Changing Operating Mode ..................................................................................... 56
Section 4 Clock Pulse Generator (CPG) .............................................................57
4.1 Features................................................................................................................................ 57
4.2 Input/Output Pins................................................................................................................. 61
4.3 Clock Operating Mode......................................................................................................... 62
4.4 Register Descriptions ........................................................................................................... 67
4.4.1 Frequency Control Register (FRQCR) ................................................................... 67
4.4.2 Oscillation Stop Detection Control Register (OSCCR) .......................................... 70
4.5 Changing Frequency ............................................................................................................ 71
4.6 Oscillator.............................................................................................................................. 72
4.6.1 Connecting Crystal Resonator ................................................................................ 72
4.6.2 External Clock Input Method.................................................................................. 73
4.7 Function for Detecting Oscillator Stop ................................................................................ 74
4.8 Usage Notes ......................................................................................................................... 75
4.8.1 Note on Crystal Resonator ...................................................................................... 75
4.8.2 Notes on Board Design ........................................................................................... 75
Section 5 Exception Handling .............................................................................77
5.1 Overview.............................................................................................................................. 77
5.1.1 Types of Exception Handling and Priority ............................................................. 77
5.1.2 Exception Handling Operations.............................................................................. 78
5.1.3 Exception Handling Vector Table .......................................................................... 79
5.2 Resets................................................................................................................................... 81
5.2.1 Types of Resets....................................................................................................... 81
5.2.2 Power-On Reset ...................................................................................................... 81
5.2.3 Manual Reset .......................................................................................................... 82
5.3 Address Errors ..................................................................................................................... 83
5.3.1 Address Error Sources ............................................................................................ 83
5.3.2 Address Error Exception Source............................................................................. 84
5.4 Interrupts.............................................................................................................................. 85
5.4.1 Interrupt Sources..................................................................................................... 85
5.4.2 Interrupt Priority ..................................................................................................... 86
5.4.3 Interrupt Exception Handling ................................................................................. 86
5.5 Exceptions Triggered by Instructions .................................................................................. 87
5.5.1 Types of Exceptions Triggered by Instructions ...................................................... 87
5.5.2 Trap Instructions..................................................................................................... 87
Rev. 3.00 Jan. 18, 2010 Page viii of xxiv
REJ09B0402-0300

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