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ADUM1280 Просмотр технического описания (PDF) - Analog Devices

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ADUM1280 Datasheet PDF : 21 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
Data Sheet
ADuM1280/ADuM1281/ADuM1285/ADuM1286
ELECTRICAL CHARACTERISTICS—MIXED 3 V/5 V OPERATION (WA, WB, AND WC GRADES)
All typical specifications are at TA = 25°C, VDD1 = 3.0 V, VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended
operation range: 3.0 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V; and −40°C ≤ TA ≤ 125°C; unless otherwise noted. Switching specifications are tested
with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 19.
Parameter
SWITCHING SPECIFICATIONS
Pulse Width
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Propagation Delay Skew
Channel Matching1
Codirectional
Opposing-Direction
Jitter
Symbol
PW
tPHL, tPLH
PWD
tPSK
tPSKCD
tPSKOD
WA Grade
Min Typ Max
1000
1
50
10
7
38
5
10
2
WB Grade
Min Typ Max
40
25
35
3
3
16
3
6
2
WC Grade
Min Typ Max
10
100
16 24 30
2.5
1.5
12
2.5
5
1
Unit
ns
Mbps
ns
ns
ps/°C
ns
ns
ns
ns
Test Conditions
Within PWD limit
Within PWD limit
50% input to 50%
output
|tPLH − tPHL|
Between any
two units at same
operating conditions
1 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation
barrier. Opposing-direction channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides
of the isolation barrier.
Table 20.
1 Mbps–WA, WB,
WC Grades
25 Mbps–WB,
WC Grades
100 Mbps–WC Grade
Parameter
Symbol Min Typ Max Min Typ Max Min Typ Max Unit Test Conditions
SUPPLY CURRENT
ADuM1280/ADuM1285 IDD1
IDD2
ADuM1281/ADuM1286 IDD1
IDD2
0.75 1.4
2.7 4.5
1.6 2.1
1.7 2.3
5.1 9.0
4.8 7.0
3.8 5.0
3.9 6.2
17 23
9.5 15
11 15
11 15
No load
mA
mA
mA
mA
Table 21. For All Models
Parameter
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
Symbol Min
VIH
0.7 VDDx
VIL
VOH
VDDx − 0.1
VDDx − 0.4
VOL
Input Current per Channel
II
−10
Supply Current per Channel
Quiescent Input Supply Current IDDI(Q)
Quiescent Output Supply Current IDDO(Q)
Dynamic Input Supply Current IDDI(D)
Dynamic Output Supply Current IDDO(D)
Undervoltage Lockout
Positive VDDX Threshold
VDDxUV+
Negative VDDX Threshold
VDDxUV−
VDDX Hysteresis
VDDxUVH
Typ
Max
VDDx
VDDx − 0.2
0.0
0.2
+0.01
0.4
1.6
0.08
0.03
2.6
2.4
0.2
0.3 VDDx
0.1
0.4
+10
0.75
2.0
Unit
Test Conditions
V
V
V
IOx = −20 μA, VIx = VIxH
V
IOx = −4 mA, VIx = VIxH
V
IOx = 20 μA, VIx = VIxL
V
IOx = 4 mA, VIx = VIxL
μA
0 V ≤ VIx ≤ VDDx
mA
mA
mA/Mbps
mA/Mbps
V
V
V
Rev. C | Page 11 of 22

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