RTL8198-GR Просмотр технического описания (PDF) - Realtek Semiconductor
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RTL8198-GR Datasheet PDF : 86 Pages
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RTL8198
Datasheet
1. General Description
The RTL8198 is an integrated System-on-a-Chip (SoC) Application Specific Integrated Circuit (ASIC)
that implements a L2 switch, L3 routing, and L4 NAT functions. An RLX5281 CPU is embedded and the
clock rate can be up to 500MHz. To improve computational performance, a 16-Kbyte I-Cache, 8-Kbyte
D-Cache, 40-K I-MEM, and 8-Kbyte D-MEM are provided. A standard 5-signal P1149.1 compliant
EJTAG test interface is supported for CPU testing and software development.
Via table configuration and look-up, the RTL8198 can perform hard-wired network traffic forwarding.
The CPU may be used to handle upper layer functions, such as DHCP, HTTP, and some other protocols,
and to operate with a hard-wired forwarding engine.
The RTL8198 provides six ports (from port 0 to port 5), integrated with six Gigabit Ethernet MACs and
five physical layer transceivers for 10Base-T, 100Base-TX, and 1000Base-TX. Each port of the RTL8198
may be configured as a LAN or WAN port. Port 5 supports an external MAC interface that could be an
GMII/RGMII/MII interface type to work with an external MAC or PHY transceiver.
The RTL8198 supports flexible IEEE 802.3x full-duplex flow control and optional half-duplex
backpressure control. For full-duplex, standard IEEE 803.3x flow control will enable pause ability only
when both sides of UTP have auto-negotiation ability and have enabled pause ability. The RTL8198 also
provides optional forced mode IEEE 802.3x full-duplex flow control. Based on optimized packet memory
management, the RTL8198 is capable of Head-Of-Line blocking prevention.
Due to its powerful protocol parser, the RTL8198 can recognize and hard-wire-forward VLAN-tagged,
SNAP/LLC, PPPoE, IP, TCP, UDP, ICMP, IGMP, and PPTP packets. Layer 2, 3, and 4 information is
stored in look-up tables. For VLAN and PPPoE protocols, the RTL8198 can automatically encapsulate
and decapsulate VLAN tagged frames and PPPoE headers.
L2 Switch Features: The RTL8198 contains a 1024-entry address look-up table with a 10-bit 4-way XOR
hashing algorithm for address searching and learning. Auto-aging of each entry is provided and the aging
time is around 200~300 seconds.
The RTL8198 supports port-based, protocol-based, and tagged VLANs. Up to four thousand VLAN
groups can be assigned. VLAN tags are inserted or removed based on the VLAN table configuration. The
spanning tree protocol is supported and the states are divided into four types: Disabled,
Blocking/Listening, Learning, and Forwarding.
For peripheral interfaces, two 16550-compatible UARTs are supported, and a 16-byte FIFO buffer is
provided. A USB 2.0 host controller is embedded in the RTL8198 to provide EHCI and OHCI 1.1
compliant host functionality. In addition, a USB PHY has been embedded in the RTL8198.
An MDI/MDIX auto crossover function is supported. For accessing high-speed devices, the RTL8198
provides a PCI Express host to access a PCI Express interface. Up to two PCI Express devices are
supported via this interface on the RTL8198.
IEEE 802.11n Gigabit Ethernet AP/Router Network Processor
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Track ID: JATR-2265-11 Rev. 0.91
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