RTL8198-GR Просмотр технического описания (PDF) - Realtek Semiconductor

Номер в каталоге

Компоненты Описание

производитель

RTL8198-GR

IEEE 802.11n GIGABIT ETHERNET AP/ROUTER NETWORK PROCESSOR

Realtek Semiconductor 

RTL8198

Datasheet

TABLE 53. SDR DRAM BUS DC PARAMETERS..........................................................................................................................48

TABLE 54. DDR DRAM BUS DC PARAMETERS .........................................................................................................................48

TABLE 55. FLASH BUS DC PARAMETERS ...................................................................................................................................48

TABLE 56. USB V1.1 DC PARAMETERS......................................................................................................................................49

TABLE 57. USB V2.0 DC PARAMETERS......................................................................................................................................49

TABLE 58. UART DC PARAMETERS...........................................................................................................................................49

TABLE 59. GPIO DC PARAMETERS ............................................................................................................................................50

TABLE 60. JTAG DC PARAMETERS............................................................................................................................................50

TABLE 61. MII DC PARAMETERS ...............................................................................................................................................50

TABLE 62. GMII DC PARAMETERS ............................................................................................................................................51

TABLE 63. RGMII DC PARAMETERS..........................................................................................................................................51

TABLE 64. RESET DC PARAMETERS ...........................................................................................................................................51

TABLE 65. LED DC PARAMETERS..............................................................................................................................................52

TABLE 66. CLOCK SIGNAL TIMING .............................................................................................................................................53

TABLE 67. SDR DRAM CLOCK TIMING.....................................................................................................................................54

TABLE 68. MII CLOCK TIMING ...................................................................................................................................................55

TABLE 69. GMII CLOCK TIMING ................................................................................................................................................56

TABLE 70. RGMII CLOCK TIMING .............................................................................................................................................57

TABLE 71. SDR DRAM INPUT TIMING ......................................................................................................................................58

TABLE 72. SDR DRAM OUTPUT TIMING ...................................................................................................................................58

TABLE 73. SDR DRAM ACCESS CONTROL TIMING ...................................................................................................................59

TABLE 74. DDR DRAM INPUT TIMING......................................................................................................................................60

TABLE 75. DDR DRAM OUTPUT TIMING ..................................................................................................................................60

TABLE 76. DDR DRAM ACCESS CONTROL TIMING...................................................................................................................60

TABLE 77. SERIAL FLASH INTERFACE OUTPUT TIMING ..............................................................................................................62

TABLE 78. SERIAL FLASH INTERFACE INTPUT TIMING................................................................................................................62

TABLE 79. MII MAC MODE OUTPUT TIMING.............................................................................................................................63

TABLE 80. MII PHY MODE OUTPUT TIMING..............................................................................................................................63

TABLE 81. MII MAC MODE INPUT TIMING VALUES ..................................................................................................................64

TABLE 82. MII PHY MODE INPUT TIMING VALUES ...................................................................................................................64

TABLE 83. GMII TIMING CHARACTERISTICS ..............................................................................................................................65

TABLE 84. RGMII TIMING CHARACTERISTICS ...........................................................................................................................66

TABLE 85. JTAG BOUNDARY SCAN INTERFACE TIMING VALUES ..............................................................................................67

TABLE 86. POWER-UP TIMING PARAMETERS..............................................................................................................................68

TABLE 87. DIFFERENTIAL TRANSMITTER PARAMETERS .............................................................................................................69

TABLE 88. DIFFERENTIAL RECEIVER PARAMETERS ....................................................................................................................70

TABLE 89. REFCLK PARAMETERS.............................................................................................................................................70

TABLE 90. THERMAL OPERATING RANGE...................................................................................................................................76

TABLE 91. THERMAL PARAMETERS ............................................................................................................................................76

TABLE 92. ORDERING INFORMATION..........................................................................................................................................78

IEEE 802.11n Gigabit Ethernet AP/Router Network Processor

vii

Track ID: JATR-2265-11 Rev. 0.91

Share Link: