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TDA9853

I2C-bus controlled economic BTSC stereo decoder and audio processor

Unspecified 

Philips Semiconductors

I2C-bus controlled economic BTSC stereo

decoder and audio processor

Product specification

TDA9853H

QUICK REFERENCE DATA

SYMBOL

PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

VCC

supply voltage

7.8 8

9

V

ICC

supply current

25 33 45 mA

Vo(rms) output voltage (RMS value) composite input voltage 250 mV (RMS) −

500 −

mV

for 100% modulation L + R

(25 kHz deviation); fmod = 300 Hz

αcsL,R

stereo channel separation

14% modulation; fL = 300 Hz; fR = 3 kHz 15

20

−

dB

L and R

THDL,R

total harmonic distortion

L and R

100% modulation L or R; fmod = 1 kHz −

0.2 1

%

S/N

signal-to-noise ratio at line out mono via I2C-bus; referenced to 500 mV

and at AF output

output signal; volume 0 dB

CCIR 468-2 weighted; quasi peak

50

60

−

dB

DIN noise weighting filter (RMS value) −

73

−

dBA

VI, O(rms) signal handling (RMS value) THD < 0.5%

2

−

−

V

AVL

AVL control range

−15 −

+6 dB

Gc

volume control range

−63 −

+12 dB

Llinear

linear tone control

−

0

−

dB

Lbass(max) tone control with maximum

bass

referenced to linear position;

fmod = 20 Hz

10

12

−

dB

Lbass(min) tone control with minimum

bass

referenced to linear position;

fmod = 20 Hz

3.5 5

−

dB

Ltreble(max) tone control with maximum

treble

referenced to linear position;

fmod = 20 kHz

6

8

−

dB

Ltreble(min) tone control with minimum

treble

referenced to linear position;

fmod = 20 kHz

−

−1.5 −

dB

2000 Dec 11

3

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