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SG6840 Просмотр технического описания (PDF) - Unspecified

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SG6840 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
SG6840
Gate Output / Soft Driving
The SG6840 BiCMOS output stage is a fast totem pole gate
driver, which is designed to avoid cross conduction current.
This minimizes heat dissipation, increases efficiency and
enhances reliability. The output driver is clamped by an
internal 18V Zener diode in order to improve the control of the
power MOSFET transistors and protect them against unde-
sirable gate over-voltage. By controlling the rising time of the
switch-on waveform and falling shape of the switch-off wave-
form, the output stage is optimized to reduce switching noise,
improve EMI, and to provide a stable MOSFET gate drive.
Built-in Slope Compensation
Current mode control regulates the peak transformer/inductor
current via the current control loop. In a continuous mode
operation, the current is the average current, and composed
of both AC and DC components. Since the output is propor-
tional to the average, not the peak current, this causes oscil-
lation when input voltage is changed. Adding the slope com-
pensation to the current loop (reduce the current loop gain) to
correct the problem is a simple approach. The SG6840 in-
serts a synchronized 0.33V positive-going ramp at every
switching cycle to stabilize the current loop. Vs-comp = 0.33V.
Product Specification
Noise immunity
Noise on the current sense or control signal can cause sig-
nificant pulse width jitter, particularly with the continuous-
mode operation. While slope compensation helps alleviate
this problem. Note that the SG6840 has a single ground pin.
High sink current in the output therefore cannot be returned
separately. Good high frequency or RF layout practices
should be followed. Avoid long PCB traces and component
leads. Locate components such as Ri, Rt and VDD capacitor
near to the SG6840. The noise, which often causes the
problem, is caused by the output (pin 8) being pulled below
ground at turn-off by external parasitic. This is particularly true
when driving MOSFET. A resistor (10 ~ 20 ohms) series
connected from the output (pin 8) to the gate of MOSFET will
prevent such output noise.
Constant Output Power Limit
Every time when the SENSE voltage, across the sense re-
sistor Rs, is larger than the threshold voltage around 0.85V,
the output GATE drive is turned off after a small propagation
delay tD. Since the propagation delay is constant regardless
the input line voltage VIN, the output power would not be equal
for the wide input voltage VIN of 90Vrms to 265Vrms. To
compensate the different output power limit between high line
voltage and low line voltage, the internal threshold voltage is
adjusted dependent on the input line voltage VIN through the
VIN pin. The threshold voltage is decreased from 0.85V to a
smaller voltage when input line voltage VIN increases. Smaller
threshold voltage, at higher input line voltage, forces the
output GATE drive to terminate earlier, thus reduce the total
PWM turn-on time and make the output power equal to that of
low input line voltage.
Thermal Protection
A constant current IRT is output from pin RT. The resistor in pin
Ri decides the current IRT.
IRT = 2 x (1.3V / Ri);
An NTC thermistor Rntc in series with a resistor Ra can be
connected from pin RT to ground. The over-temperature
2002 System General Corporation
-8-
Ver1.0
http://www.sg.com.tw

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