RTD2120L-LF Просмотр технического описания (PDF) - Realtek Semiconductor
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RTD2120L-LF Datasheet PDF : 37 Pages
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Realtek
RTD2120-series
To activate software reset, set FF39[1](SOF_RST). When software reset is triggered, it will reset
all modules except debug mode.
l Watchdog timer(WDT)
The watchdog timer generates reset when it is overflowed. The watchdog timer resets almost the
same modules as software reset except itself(watchdog timer module).
l In System Programing(ISP) reset
ISP reset will generate when entering ISP mode. Compared to Watchdog timer reset, ISP mode
resets almost the same modules as Watchdog timer except itself(ISP module).
Debug mode
module
RST pin
O
LVR & POR
O
Software reset
x
WDT reset
x
ISP reset
x
Note: O = Reset , x = No effect
Watchdog timer CPU
module
O
O
O
O
O
O
x
O
x
O
ISP module and
other modules
O
O
O
x
x
Interrupt
Six interrupts are provided in RTD2120. Four of these are generated automatically by internal
operation: timer 0, timer 1, timer 2 and the serial port interrupt. The other two interrupts are triggered
by external pins: INT0 and INT1. Moreover, the DDC and IIC interrupts are connected to DW8051
INT1 source as the following figure.
pin INT1
A_WR_I
D_WR_I
128VS_I
STOP_I
D_OUT_I
D_IN_I
SUB_I
SLV_I
PIN_INT1_EN
AWRI_EN
DWRI_EN
VSI_EN
STOPI_EN
DOLI_EN
DILI_EN
SUBI_EN
SLVI_EN
to DW8051 INT1
Timer/Counter
RTD2120 has three timers/counters: T0, T1 andT2. T0 and T1 are fully compatible to
timer/counter in standard 8051’s. Like timer2 in 8052, T2 of RTD2120 has three operating modes: 16-
bit timer/counter with capture, 16-bit auto-reload timer/counter and Baud rate generator. However, T2
of RTD2120 does not support “Timer2 output enable(T2OE)” and “downcount enable(DCEN)”. The
SFRs associated with Timer2 are listed below.
Register Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Addr
T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 C/T2 CP/RL2 C8h
RCAP2L
CAh
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