HCPL-7710-020E Просмотр технического описания (PDF) - Avago Technologies
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HCPL-7710-020E Datasheet PDF : 17 Pages
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Application Information
Bypassing and PC Board Layout
The HCPL-x710 optocouplers are extremely easy to use. No external interface circuitry is required because the
HCPL-x710 use high-speed CMOS IC technology allowing CMOS logic to be connected directly to the inputs and
outputs.
As shown in Figure 12, the only external components required for proper operation are two bypass capacitors.
Capacitor values should be between 0.01 µF and 0.1 µF. For each capacitor, the total lead length between both
ends of the capacitor and the power-supply pins should not exceed 20 mm. Figure 13 illustrates the recommended
printed circuit board layout for the HPCL-x710.
VDD1
1
C1
VI
2
8
C2
7 NC
VDD2
NC 3
GND1
4
6
VO
5
GND2
C1, C2 = 0.01 µF TO 0.1 µF
Figure 12. Recommended Printed Circuit Board layout.
VDD1
VI
C1
GND1
Figure 13. Recommended Printed Circuit Board layout.
VDD2
C2
VO
GND2
C1, C2 = 0.01 µF TO 0.1 µF
Propagation Delay, Pulse-Width Distortion and Propagation Delay Skew
Propagation Delay is a figure of merit that describes how quickly a logic signal propagates through a system. The
propagation delay from low to high (tPLH) is the amount of time required for an input signal to propagate to the
output, causing the output to change from low to high. Similarly, the propagation delay from high to low (tPHL) is
the amount of time required for the input signal to propagate to the output, causing the output to change from
high to low. See Figure 14.
INPUT
VI
OUTPUT
VO
10%
tPLH
90%
Figure 14.
tPHL
50%
90%
10%
5 V CMOS
0V
VOH
2.5 V CMOS
VOL
10
HCPL-0710 fig 13
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